mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 19:00:25 +00:00
Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
This commit is contained in:
commit
6139dbbb77
15 changed files with 72 additions and 55 deletions
|
@ -16,6 +16,8 @@
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#include <linux/spi/spi.h>
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#include <linux/spi/ads7846.h>
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#include <linux/workqueue.h>
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#include <linux/delay.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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@ -103,7 +105,7 @@ static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata =
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static struct spi_board_info nokia770_spi_board_info[] __initdata = {
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[0] = {
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.modalias = "lcd_lph8923",
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.modalias = "lcd_mipid",
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.bus_num = 2,
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.chip_select = 3,
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.max_speed_hz = 12000000,
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|
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@ -432,8 +432,7 @@ static int omap1_clk_enable(struct clk *clk)
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}
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if (clk->flags & CLOCK_NO_IDLE_PARENT)
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if (!cpu_is_omap24xx())
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omap1_clk_deny_idle(clk->parent);
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omap1_clk_deny_idle(clk->parent);
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}
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ret = clk->enable(clk);
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@ -454,8 +453,7 @@ static void omap1_clk_disable(struct clk *clk)
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if (likely(clk->parent)) {
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omap1_clk_disable(clk->parent);
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if (clk->flags & CLOCK_NO_IDLE_PARENT)
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if (!cpu_is_omap24xx())
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omap1_clk_allow_idle(clk->parent);
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omap1_clk_allow_idle(clk->parent);
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}
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}
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}
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@ -471,7 +469,7 @@ static int omap1_clk_enable_generic(struct clk *clk)
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if (unlikely(clk->enable_reg == 0)) {
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printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
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clk->name);
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return 0;
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return -EINVAL;
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}
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if (clk->flags & ENABLE_REG_32BIT) {
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@ -651,10 +649,18 @@ int __init omap1_clk_init(void)
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int crystal_type = 0; /* Default 12 MHz */
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u32 reg;
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#ifdef CONFIG_DEBUG_LL
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/* Resets some clocks that may be left on from bootloader,
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* but leaves serial clocks on.
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*/
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omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
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#endif
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/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
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reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
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omap_writew(reg, SOFT_REQ_REG);
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omap_writew(0, SOFT_REQ_REG2);
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if (!cpu_is_omap15xx())
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omap_writew(0, SOFT_REQ_REG2);
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clk_init(&omap1_clk_functions);
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@ -685,7 +691,7 @@ int __init omap1_clk_init(void)
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info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
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if (info != NULL) {
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if (!cpu_is_omap1510())
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if (!cpu_is_omap15xx())
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crystal_type = info->system_clock_type;
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}
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@ -238,7 +238,7 @@ void __init omap_init_irq(void)
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if (cpu_is_omap730())
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omap_unmask_irq(INT_730_IH2_IRQ);
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else if (cpu_is_omap1510())
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else if (cpu_is_omap15xx())
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omap_unmask_irq(INT_1510_IH2_IRQ);
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else if (cpu_is_omap16xx())
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omap_unmask_irq(INT_1610_IH2_IRQ);
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@ -256,7 +256,8 @@ void omap_pm_suspend(void)
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tps65010_set_led(LED1, OFF);
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}
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omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
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if (!cpu_is_omap15xx())
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omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
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/*
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* Step 1: turn off interrupts (FIXME: NOTE: already disabled)
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@ -434,7 +435,8 @@ void omap_pm_suspend(void)
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MPUI1610_RESTORE(OMAP_IH2_3_MIR);
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}
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omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
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if (!cpu_is_omap15xx())
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omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
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/*
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* Reenable interrupts
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@ -704,6 +706,8 @@ static struct pm_ops omap_pm_ops ={
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static int __init omap_pm_init(void)
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{
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int error;
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printk("Power Management for TI OMAP.\n");
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/*
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@ -760,7 +764,9 @@ static int __init omap_pm_init(void)
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omap_pm_init_proc();
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#endif
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subsys_create_file(&power_subsys, &sleep_while_idle_attr);
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error = subsys_create_file(&power_subsys, &sleep_while_idle_attr);
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if (error)
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printk(KERN_ERR "subsys_create_file failed: %d\n", error);
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if (cpu_is_omap16xx()) {
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/* configure LOW_PWR pin */
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@ -1,7 +1,7 @@
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/*
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* linux/arch/arm/mach-omap1/serial.c
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*
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* OMAP1 CPU identification code
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* OMAP1 serial support.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -59,7 +59,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
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omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
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omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
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if (!cpu_is_omap1510()) {
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if (!cpu_is_omap15xx()) {
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omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
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while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
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}
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@ -121,7 +121,7 @@ void __init omap_serial_init(void)
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serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
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}
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if (cpu_is_omap1510()) {
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if (cpu_is_omap15xx()) {
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serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
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serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
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serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
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@ -147,10 +147,10 @@ void __init omap_serial_init(void)
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printk("Could not get uart1_ck\n");
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else {
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clk_enable(uart1_ck);
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if (cpu_is_omap1510())
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if (cpu_is_omap15xx())
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clk_set_rate(uart1_ck, 12000000);
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}
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if (cpu_is_omap1510()) {
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(UART1_TX);
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omap_cfg_reg(UART1_RTS);
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if (machine_is_omap_innovator()) {
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@ -167,12 +167,12 @@ void __init omap_serial_init(void)
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printk("Could not get uart2_ck\n");
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else {
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clk_enable(uart2_ck);
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if (cpu_is_omap1510())
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if (cpu_is_omap15xx())
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clk_set_rate(uart2_ck, 12000000);
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else
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clk_set_rate(uart2_ck, 48000000);
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}
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if (cpu_is_omap1510()) {
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(UART2_TX);
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omap_cfg_reg(UART2_RTS);
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if (machine_is_omap_innovator()) {
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@ -189,10 +189,10 @@ void __init omap_serial_init(void)
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printk("Could not get uart3_ck\n");
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else {
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clk_enable(uart3_ck);
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if (cpu_is_omap1510())
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if (cpu_is_omap15xx())
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clk_set_rate(uart3_ck, 12000000);
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}
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if (cpu_is_omap1510()) {
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(UART3_TX);
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omap_cfg_reg(UART3_RX);
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}
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@ -39,7 +39,6 @@
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#include "prcm-regs.h"
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#include <asm/io.h>
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#include <asm/delay.h>
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static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
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static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
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@ -179,9 +178,11 @@ static int h4_select_irda(struct device *dev, int state)
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return err;
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}
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static void set_trans_mode(void *data)
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static void set_trans_mode(struct work_struct *work)
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{
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int *mode = data;
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struct omap_irda_config *irda_config =
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container_of(work, struct omap_irda_config, gpio_expa.work);
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int mode = irda_config->mode;
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unsigned char expa;
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int err = 0;
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@ -191,7 +192,7 @@ static void set_trans_mode(void *data)
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expa &= ~0x01;
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if (!(*mode & IR_SIRMODE)) { /* MIR/FIR */
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if (!(mode & IR_SIRMODE)) { /* MIR/FIR */
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expa |= 0x01;
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}
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@ -204,9 +205,9 @@ static int h4_transceiver_mode(struct device *dev, int mode)
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{
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struct omap_irda_config *irda_config = dev->platform_data;
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irda_config->mode = mode;
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cancel_delayed_work(&irda_config->gpio_expa);
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PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
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#error this is not permitted - mode is an argument variable
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PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
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schedule_delayed_work(&irda_config->gpio_expa, 0);
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return 0;
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@ -24,6 +24,7 @@
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <asm/mach/time.h>
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#include <asm/arch/dmtimer.h>
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@ -64,7 +65,7 @@ static void __init omap2_gp_timer_init(void)
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BUG_ON(gptimer == NULL);
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omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
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tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100;
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tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
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tick_period -= 1;
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setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
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|
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@ -557,7 +557,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
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omap_enable_channel_irq(free_ch);
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/* Clear the CSR register and IRQ status register */
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OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK;
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omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0);
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omap_writel(1 << free_ch, OMAP_DMA4_IRQSTATUS_L0);
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}
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*dma_ch_out = free_ch;
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@ -597,10 +597,7 @@ void omap_free_dma(int lch)
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/* Clear the CSR register and IRQ status register */
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OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK;
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val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
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val |= 1 << lch;
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omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
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omap_writel(1 << lch, OMAP_DMA4_IRQSTATUS_L0);
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/* Disable all DMA interrupts for the channel. */
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OMAP_DMA_CICR_REG(lch) = 0;
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@ -927,7 +924,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
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static int omap2_dma_handle_ch(int ch)
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{
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u32 status = OMAP_DMA_CSR_REG(ch);
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u32 val;
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if (!status)
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return 0;
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@ -948,11 +944,7 @@ static int omap2_dma_handle_ch(int ch)
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dma_chan[ch].dev_id);
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OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK;
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val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
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/* ch in this function is from 0-31 while in register it is 1-32 */
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val = 1 << (ch);
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omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
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omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
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if (likely(dma_chan[ch].callback != NULL))
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dma_chan[ch].callback(ch, status, dma_chan[ch].data);
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|
|
|
@ -90,8 +90,8 @@ static struct omap_dm_timer dm_timers[] = {
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{ .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 },
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{ .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 },
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{ .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 },
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{ .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 },
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{ .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 },
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{ .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 },
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{ .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 },
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};
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#elif defined(CONFIG_ARCH_OMAP2)
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|
@ -314,6 +314,8 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
|
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{
|
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BUG();
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return 0;
|
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}
|
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|
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#endif
|
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|
|
|
@ -974,10 +974,11 @@ static struct irq_chip gpio_irq_chip = {
|
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};
|
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|
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static struct irq_chip mpuio_irq_chip = {
|
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.name = "MPUIO",
|
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.ack = mpuio_ack_irq,
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.mask = mpuio_mask_irq,
|
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.unmask = mpuio_unmask_irq
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.name = "MPUIO",
|
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.ack = mpuio_ack_irq,
|
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.mask = mpuio_mask_irq,
|
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.unmask = mpuio_unmask_irq,
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.set_type = gpio_irq_type,
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};
|
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|
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static int initialized;
|
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|
|
|
@ -20,8 +20,8 @@
|
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#include <linux/interrupt.h>
|
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#include <linux/err.h>
|
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#include <linux/clk.h>
|
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#include <linux/delay.h>
|
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|
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#include <asm/delay.h>
|
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#include <asm/io.h>
|
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#include <asm/irq.h>
|
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|
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|
|
|
@ -116,7 +116,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
|
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}
|
||||
|
||||
/* Check for pull up or pull down selection on 1610 */
|
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if (!cpu_is_omap1510()) {
|
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if (!cpu_is_omap15xx()) {
|
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if (cfg->pu_pd_reg && cfg->pull_val) {
|
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spin_lock_irqsave(&mux_spin_lock, flags);
|
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pu_pd_orig = omap_readl(cfg->pu_pd_reg);
|
||||
|
@ -172,7 +172,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
|
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printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
|
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cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
|
||||
|
||||
if (!cpu_is_omap1510()) {
|
||||
if (!cpu_is_omap15xx()) {
|
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if (cfg->pu_pd_reg && cfg->pull_val) {
|
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printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
|
||||
cfg->pu_pd_name, cfg->pu_pd_reg,
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||||
|
|
|
@ -61,6 +61,12 @@
|
|||
.macro disable_fiq
|
||||
.endm
|
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|
||||
.macro get_irqnr_preamble, base, tmp
|
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.endm
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||||
|
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.macro arch_ret_to_user, tmp1, tmp2
|
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.endm
|
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|
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
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ldr \base, =VA_IC_BASE
|
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ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
|
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|
|
|
@ -70,7 +70,7 @@
|
|||
|
||||
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
|
||||
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
|
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#define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
|
||||
#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
|
||||
|
||||
#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \
|
||||
(dma_addr_t)virt_to_lbus(page_address(page)) : \
|
||||
|
|
|
@ -65,7 +65,7 @@ struct audio_stream {
|
|||
int period; /* current transfer period */
|
||||
int periods; /* current count of periods registerd in the DMA engine */
|
||||
spinlock_t dma_lock; /* for locking in DMA operations */
|
||||
snd_pcm_substream_t *stream; /* the pcm stream */
|
||||
struct snd_pcm_substream *stream; /* the pcm stream */
|
||||
unsigned linked:1; /* dma channels linked */
|
||||
int offset; /* store start position of the last period in the alsa buffer */
|
||||
int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */
|
||||
|
@ -76,8 +76,8 @@ struct audio_stream {
|
|||
* Alsa card structure for aic23
|
||||
*/
|
||||
struct snd_card_omap_codec {
|
||||
snd_card_t *card;
|
||||
snd_pcm_t *pcm;
|
||||
struct snd_card *card;
|
||||
struct snd_pcm *pcm;
|
||||
long samplerate;
|
||||
struct audio_stream s[2]; /* playback & capture */
|
||||
};
|
||||
|
@ -89,9 +89,9 @@ struct snd_card_omap_codec {
|
|||
struct omap_alsa_codec_config {
|
||||
char *name;
|
||||
struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa;
|
||||
snd_pcm_hw_constraint_list_t *hw_constraints_rates;
|
||||
snd_pcm_hardware_t *snd_omap_alsa_playback;
|
||||
snd_pcm_hardware_t *snd_omap_alsa_capture;
|
||||
struct snd_pcm_hw_constraint_list *hw_constraints_rates;
|
||||
struct snd_pcm_hardware *snd_omap_alsa_playback;
|
||||
struct snd_pcm_hardware *snd_omap_alsa_capture;
|
||||
void (*codec_configure_dev)(void);
|
||||
void (*codec_set_samplerate)(long);
|
||||
void (*codec_clock_setup)(void);
|
||||
|
|
Loading…
Reference in a new issue