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mmc: remove imxmmc driver
This driver is broken since 2.6.31 when the traditional i.MX1 support was removed. In theory the i.MX1 mmc controller can be supported by the mxcmmc driver which basically is the same hardware. However, the i.MX1 controller has severe bugs which made several workarounds necessary which resulted in a different driver structure. At that time it seemed easier to write a second driver to support hardware without bugs. As noone cared for the i.MX1 driver for a long time and it does not compile, remove it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
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4 changed files with 0 additions and 1244 deletions
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@ -307,16 +307,6 @@ config MMC_ATMELMCI_DMA
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If unsure, say N.
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config MMC_IMX
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tristate "Motorola i.MX Multimedia Card Interface support"
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depends on ARCH_MX1
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help
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This selects the Motorola i.MX Multimedia card Interface.
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If you have a i.MX platform with a Multimedia Card slot,
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say Y or M here.
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If unsure, say N.
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config MMC_MSM
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tristate "Qualcomm SDCC Controller Support"
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depends on MMC && ARCH_MSM
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@ -4,7 +4,6 @@
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obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
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obj-$(CONFIG_MMC_PXA) += pxamci.o
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obj-$(CONFIG_MMC_IMX) += imxmmc.o
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obj-$(CONFIG_MMC_MXC) += mxcmmc.o
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obj-$(CONFIG_MMC_MXS) += mxs-mmc.o
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obj-$(CONFIG_MMC_SDHCI) += sdhci.o
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File diff suppressed because it is too large
Load diff
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@ -1,64 +0,0 @@
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#define MMC_REG_STR_STP_CLK 0x00
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#define MMC_REG_STATUS 0x04
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#define MMC_REG_CLK_RATE 0x08
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#define MMC_REG_CMD_DAT_CONT 0x0C
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#define MMC_REG_RES_TO 0x10
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#define MMC_REG_READ_TO 0x14
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#define MMC_REG_BLK_LEN 0x18
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#define MMC_REG_NOB 0x1C
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#define MMC_REG_REV_NO 0x20
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#define MMC_REG_INT_MASK 0x24
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#define MMC_REG_CMD 0x28
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#define MMC_REG_ARGH 0x2C
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#define MMC_REG_ARGL 0x30
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#define MMC_REG_RES_FIFO 0x34
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#define MMC_REG_BUFFER_ACCESS 0x38
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#define STR_STP_CLK_IPG_CLK_GATE_DIS (1<<15)
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#define STR_STP_CLK_IPG_PERCLK_GATE_DIS (1<<14)
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#define STR_STP_CLK_ENDIAN (1<<5)
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#define STR_STP_CLK_RESET (1<<3)
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#define STR_STP_CLK_ENABLE (1<<2)
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#define STR_STP_CLK_START_CLK (1<<1)
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#define STR_STP_CLK_STOP_CLK (1<<0)
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#define STATUS_CARD_PRESENCE (1<<15)
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#define STATUS_SDIO_INT_ACTIVE (1<<14)
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#define STATUS_END_CMD_RESP (1<<13)
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#define STATUS_WRITE_OP_DONE (1<<12)
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#define STATUS_DATA_TRANS_DONE (1<<11)
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#define STATUS_WR_CRC_ERROR_CODE_MASK (3<<10)
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#define STATUS_CARD_BUS_CLK_RUN (1<<8)
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#define STATUS_APPL_BUFF_FF (1<<7)
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#define STATUS_APPL_BUFF_FE (1<<6)
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#define STATUS_RESP_CRC_ERR (1<<5)
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#define STATUS_CRC_READ_ERR (1<<3)
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#define STATUS_CRC_WRITE_ERR (1<<2)
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#define STATUS_TIME_OUT_RESP (1<<1)
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#define STATUS_TIME_OUT_READ (1<<0)
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#define STATUS_ERR_MASK 0x2f
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#define CLK_RATE_PRESCALER(x) ((x) & 0x7)
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#define CLK_RATE_CLK_RATE(x) (((x) & 0x7) << 3)
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#define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1<<12)
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#define CMD_DAT_CONT_STOP_READWAIT (1<<11)
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#define CMD_DAT_CONT_START_READWAIT (1<<10)
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#define CMD_DAT_CONT_BUS_WIDTH_1 (0<<8)
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#define CMD_DAT_CONT_BUS_WIDTH_4 (2<<8)
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#define CMD_DAT_CONT_INIT (1<<7)
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#define CMD_DAT_CONT_BUSY (1<<6)
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#define CMD_DAT_CONT_STREAM_BLOCK (1<<5)
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#define CMD_DAT_CONT_WRITE (1<<4)
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#define CMD_DAT_CONT_DATA_ENABLE (1<<3)
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#define CMD_DAT_CONT_RESPONSE_FORMAT_R1 (1)
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#define CMD_DAT_CONT_RESPONSE_FORMAT_R2 (2)
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#define CMD_DAT_CONT_RESPONSE_FORMAT_R3 (3)
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#define CMD_DAT_CONT_RESPONSE_FORMAT_R4 (4)
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#define CMD_DAT_CONT_RESPONSE_FORMAT_R5 (5)
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#define CMD_DAT_CONT_RESPONSE_FORMAT_R6 (6)
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#define INT_MASK_AUTO_CARD_DETECT (1<<6)
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#define INT_MASK_DAT0_EN (1<<5)
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#define INT_MASK_SDIO (1<<4)
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#define INT_MASK_BUF_READY (1<<3)
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#define INT_MASK_END_CMD_RES (1<<2)
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#define INT_MASK_WRITE_OP_DONE (1<<1)
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#define INT_MASK_DATA_TRAN (1<<0)
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#define INT_ALL (0x7f)
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