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ARM: OMAP2+: PRM: provide generic API for system reset
This patch combines the various prm_warm_reset calls under a common API prm_reset_system, and adds the SoC specific implementation under prm_ll_data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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13 changed files with 36 additions and 22 deletions
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@ -9,8 +9,7 @@
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#include <linux/reboot.h>
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#include <linux/reboot.h>
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#include "common.h"
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#include "common.h"
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#include "prm-regbits-33xx.h"
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#include "prm.h"
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#include "prm33xx.h"
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/**
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/**
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* am3xx_restart - trigger a software restart of the SoC
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* am3xx_restart - trigger a software restart of the SoC
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@ -24,5 +23,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
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{
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{
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/* TODO: Handle mode and cmd if necessary */
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/* TODO: Handle mode and cmd if necessary */
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am33xx_prm_global_warm_sw_reset();
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omap_prm_reset_system();
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}
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}
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@ -15,7 +15,7 @@
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#include "soc.h"
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#include "soc.h"
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#include "common.h"
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#include "common.h"
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#include "prm2xxx.h"
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#include "prm.h"
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/*
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/*
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* reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
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* reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
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@ -40,8 +40,7 @@ void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
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/* XXX Should save the cmd argument for use after the reboot */
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/* XXX Should save the cmd argument for use after the reboot */
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omap2xxx_prm_dpll_reset(); /* never returns */
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omap_prm_reset_system();
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while (1);
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}
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}
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/**
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/**
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@ -14,10 +14,8 @@
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/reboot.h>
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#include <linux/reboot.h>
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#include "iomap.h"
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#include "common.h"
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#include "control.h"
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#include "control.h"
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#include "prm3xxx.h"
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#include "prm.h"
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/* Global address base setup code */
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/* Global address base setup code */
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@ -32,6 +30,5 @@
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void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
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void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
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{
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{
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omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
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omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
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omap3xxx_prm_dpll3_reset(); /* never returns */
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omap_prm_reset_system();
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while (1);
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}
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}
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@ -9,7 +9,7 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/reboot.h>
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#include <linux/reboot.h>
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#include "prminst44xx.h"
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#include "prm.h"
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/**
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/**
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* omap44xx_restart - trigger a software restart of the SoC
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* omap44xx_restart - trigger a software restart of the SoC
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@ -22,7 +22,5 @@
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void omap44xx_restart(enum reboot_mode mode, const char *cmd)
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void omap44xx_restart(enum reboot_mode mode, const char *cmd)
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{
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{
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/* XXX Should save 'cmd' into scratchpad for use after reboot */
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/* XXX Should save 'cmd' into scratchpad for use after reboot */
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omap4_prminst_global_warm_sw_reset(); /* never returns */
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omap_prm_reset_system();
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while (1)
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;
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}
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}
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@ -144,6 +144,7 @@ struct prm_ll_data {
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u16 offset, u16 st_offset);
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u16 offset, u16 st_offset);
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int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
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int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
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u16 offset);
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u16 offset);
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void (*reset_system)(void);
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};
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};
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extern int prm_register(struct prm_ll_data *pld);
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extern int prm_register(struct prm_ll_data *pld);
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@ -156,6 +157,7 @@ int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
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extern u32 prm_read_reset_sources(void);
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extern u32 prm_read_reset_sources(void);
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extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
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extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
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extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
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extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
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void omap_prm_reset_system(void);
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void omap_prm_reconfigure_io_chain(void);
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void omap_prm_reconfigure_io_chain(void);
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@ -106,7 +106,7 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
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* Set the DPLL reset bit, which should reboot the SoC. This is the
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* Set the DPLL reset bit, which should reboot the SoC. This is the
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* recommended way to restart the SoC. No return value.
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* recommended way to restart the SoC. No return value.
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*/
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*/
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void omap2xxx_prm_dpll_reset(void)
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static void omap2xxx_prm_dpll_reset(void)
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{
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{
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omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
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omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
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OMAP2_RM_RSTCTRL);
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OMAP2_RM_RSTCTRL);
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@ -215,6 +215,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
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.assert_hardreset = &omap2_prm_assert_hardreset,
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.assert_hardreset = &omap2_prm_assert_hardreset,
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.deassert_hardreset = &omap2_prm_deassert_hardreset,
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.deassert_hardreset = &omap2_prm_deassert_hardreset,
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.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
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.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
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.reset_system = &omap2xxx_prm_dpll_reset,
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};
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};
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int __init omap2xxx_prm_init(void)
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int __init omap2xxx_prm_init(void)
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@ -124,7 +124,6 @@
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extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
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extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
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extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
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extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
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extern void omap2xxx_prm_dpll_reset(void);
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void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
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void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
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extern int __init omap2xxx_prm_init(void);
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extern int __init omap2xxx_prm_init(void);
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@ -341,7 +341,7 @@ static int am33xx_check_vcvp(void)
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*
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*
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* Immediately reboots the device through warm reset.
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* Immediately reboots the device through warm reset.
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*/
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*/
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void am33xx_prm_global_warm_sw_reset(void)
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static void am33xx_prm_global_warm_sw_reset(void)
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{
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{
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am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
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am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
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AM33XX_RST_GLOBAL_WARM_SW_MASK,
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AM33XX_RST_GLOBAL_WARM_SW_MASK,
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.assert_hardreset = am33xx_prm_assert_hardreset,
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.assert_hardreset = am33xx_prm_assert_hardreset,
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.deassert_hardreset = am33xx_prm_deassert_hardreset,
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.deassert_hardreset = am33xx_prm_deassert_hardreset,
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.is_hardreset_asserted = am33xx_prm_is_hardreset_asserted,
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.is_hardreset_asserted = am33xx_prm_is_hardreset_asserted,
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.reset_system = am33xx_prm_global_warm_sw_reset,
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};
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};
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int __init am33xx_prm_init(void)
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int __init am33xx_prm_init(void)
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@ -118,7 +118,6 @@
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#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
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#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
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#ifndef __ASSEMBLER__
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#ifndef __ASSEMBLER__
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extern void am33xx_prm_global_warm_sw_reset(void);
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int am33xx_prm_init(void);
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int am33xx_prm_init(void);
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#endif /* ASSEMBLER */
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#endif /* ASSEMBLER */
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* recommended way to restart the SoC, considering Errata i520. No
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* recommended way to restart the SoC, considering Errata i520. No
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* return value.
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* return value.
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*/
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*/
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void omap3xxx_prm_dpll3_reset(void)
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static void omap3xxx_prm_dpll3_reset(void)
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{
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{
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omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
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omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
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OMAP2_RM_RSTCTRL);
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OMAP2_RM_RSTCTRL);
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.assert_hardreset = &omap2_prm_assert_hardreset,
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.assert_hardreset = &omap2_prm_assert_hardreset,
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.deassert_hardreset = &omap2_prm_deassert_hardreset,
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.deassert_hardreset = &omap2_prm_deassert_hardreset,
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.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
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.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
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.reset_system = &omap3xxx_prm_dpll3_reset,
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};
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};
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int __init omap3xxx_prm_init(void)
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int __init omap3xxx_prm_init(void)
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extern void omap3_prm_vcvp_write(u32 val, u8 offset);
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extern void omap3_prm_vcvp_write(u32 val, u8 offset);
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extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
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extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
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extern void omap3xxx_prm_dpll3_reset(void);
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extern int __init omap3xxx_prm_init(void);
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extern int __init omap3xxx_prm_init(void);
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extern u32 omap3xxx_prm_get_reset_sources(void);
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extern u32 omap3xxx_prm_get_reset_sources(void);
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int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
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int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
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.assert_hardreset = omap4_prminst_assert_hardreset,
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.assert_hardreset = omap4_prminst_assert_hardreset,
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.deassert_hardreset = omap4_prminst_deassert_hardreset,
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.deassert_hardreset = omap4_prminst_deassert_hardreset,
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.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
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.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
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.reset_system = omap4_prminst_global_warm_sw_reset,
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};
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};
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int __init omap44xx_prm_init(void)
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int __init omap44xx_prm_init(void)
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prcm_irq_setup->reconfigure_io_chain();
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prcm_irq_setup->reconfigure_io_chain();
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}
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}
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/**
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* omap_prm_reset_system - trigger global SW reset
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*
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* Triggers SoC specific global warm reset to reboot the device.
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*/
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void omap_prm_reset_system(void)
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{
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if (!prm_ll_data->reset_system) {
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WARN_ONCE(1, "prm: %s: no mapping function defined\n",
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__func__);
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return;
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}
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prm_ll_data->reset_system();
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while (1)
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cpu_relax();
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}
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/**
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/**
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* prm_register - register per-SoC low-level data with the PRM
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* prm_register - register per-SoC low-level data with the PRM
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* @pld: low-level per-SoC OMAP PRM data & function pointers to register
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* @pld: low-level per-SoC OMAP PRM data & function pointers to register
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