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KVM: x86: Inject #GP on x2APIC WRMSR that sets reserved bits 63:32

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commit ab52be1b31 upstream.

Reject attempts to set bits 63:32 for 32-bit x2APIC registers, i.e. all
x2APIC registers except ICR.  Per Intel's SDM:

  Non-zero writes (by WRMSR instruction) to reserved bits to these
  registers will raise a general protection fault exception

Opportunistically fix a typo in a nearby comment.

Reported-by: Marc Orr <marcorr@google.com>
Cc: stable@vger.kernel.org
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Link: https://lore.kernel.org/r/20230107011025.565472-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sean Christopherson 2023-01-07 01:10:21 +00:00 committed by Greg Kroah-Hartman
parent 4483dc41d1
commit 61e0863dc8
1 changed files with 8 additions and 0 deletions
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8
arch/x86/kvm/lapic.c
View file

@ -2802,6 +2802,10 @@ int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
/* if this is ICR write vector before command */
if (reg == APIC_ICR)
kvm_lapic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
else if (data >> 32)
/* Bits 63:32 are reserved in all other registers. */
return 1;
return kvm_lapic_reg_write(apic, reg, (u32)data);
}
@ -2836,6 +2840,10 @@ int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 reg, u64 data)
/* if this is ICR write vector before command */
if (reg == APIC_ICR)
kvm_lapic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
else if (data >> 32)
/* Bits 63:32 are reserved in all other registers. */
return 1;
return kvm_lapic_reg_write(apic, reg, (u32)data);
}