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x86/mm/pti: Add mapping helper functions
Add the pagetable helper functions do manage the separate user space page tables. [ tglx: Split out from the big combo kaiser patch. Folded Andys simplification and made it out of line as Boris suggested ] Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: David Laight <David.Laight@aculab.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Eduardo Valentin <eduval@amazon.com> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will.deacon@arm.com> Cc: aliguori@amazon.com Cc: daniel.gruss@iaik.tugraz.at Cc: hughd@google.com Cc: keescook@google.com Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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3 changed files with 138 additions and 1 deletions
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@ -909,7 +909,11 @@ static inline int pgd_none(pgd_t pgd)
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* pgd_offset() returns a (pgd_t *)
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* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
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*/
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
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#define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address)))
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/*
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* a shortcut to get a pgd_t in a given mm
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*/
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#define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
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/*
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* a shortcut which implies the use of the kernel's pgd, instead
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* of a process's
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@ -131,9 +131,97 @@ static inline pud_t native_pudp_get_and_clear(pud_t *xp)
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#endif
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}
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#ifdef CONFIG_PAGE_TABLE_ISOLATION
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/*
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* All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages
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* (8k-aligned and 8k in size). The kernel one is at the beginning 4k and
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* the user one is in the last 4k. To switch between them, you
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* just need to flip the 12th bit in their addresses.
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*/
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#define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT
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/*
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* This generates better code than the inline assembly in
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* __set_bit().
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*/
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static inline void *ptr_set_bit(void *ptr, int bit)
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{
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unsigned long __ptr = (unsigned long)ptr;
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__ptr |= BIT(bit);
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return (void *)__ptr;
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}
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static inline void *ptr_clear_bit(void *ptr, int bit)
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{
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unsigned long __ptr = (unsigned long)ptr;
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__ptr &= ~BIT(bit);
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return (void *)__ptr;
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}
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static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
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{
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return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
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}
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static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
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{
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return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
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}
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static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
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{
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return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
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}
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static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
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{
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return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
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}
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#endif /* CONFIG_PAGE_TABLE_ISOLATION */
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/*
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* Page table pages are page-aligned. The lower half of the top
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* level is used for userspace and the top half for the kernel.
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*
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* Returns true for parts of the PGD that map userspace and
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* false for the parts that map the kernel.
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*/
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static inline bool pgdp_maps_userspace(void *__ptr)
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{
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unsigned long ptr = (unsigned long)__ptr;
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return (ptr & ~PAGE_MASK) < (PAGE_SIZE / 2);
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}
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#ifdef CONFIG_PAGE_TABLE_ISOLATION
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pgd_t __pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd);
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/*
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* Take a PGD location (pgdp) and a pgd value that needs to be set there.
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* Populates the user and returns the resulting PGD that must be set in
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* the kernel copy of the page tables.
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*/
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static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd)
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{
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if (!static_cpu_has(X86_FEATURE_PTI))
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return pgd;
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return __pti_set_user_pgd(pgdp, pgd);
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}
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#else
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static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd)
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{
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return pgd;
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}
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#endif
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static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
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{
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#if defined(CONFIG_PAGE_TABLE_ISOLATION) && !defined(CONFIG_X86_5LEVEL)
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p4dp->pgd = pti_set_user_pgd(&p4dp->pgd, p4d.pgd);
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#else
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*p4dp = p4d;
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#endif
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}
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static inline void native_p4d_clear(p4d_t *p4d)
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@ -147,7 +235,11 @@ static inline void native_p4d_clear(p4d_t *p4d)
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static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
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{
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#ifdef CONFIG_PAGE_TABLE_ISOLATION
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*pgdp = pti_set_user_pgd(pgdp, pgd);
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#else
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*pgdp = pgd;
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#endif
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}
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static inline void native_pgd_clear(pgd_t *pgd)
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@ -96,6 +96,47 @@ void __init pti_check_boottime_disable(void)
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setup_force_cpu_cap(X86_FEATURE_PTI);
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}
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pgd_t __pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd)
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{
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/*
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* Changes to the high (kernel) portion of the kernelmode page
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* tables are not automatically propagated to the usermode tables.
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*
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* Users should keep in mind that, unlike the kernelmode tables,
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* there is no vmalloc_fault equivalent for the usermode tables.
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* Top-level entries added to init_mm's usermode pgd after boot
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* will not be automatically propagated to other mms.
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*/
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if (!pgdp_maps_userspace(pgdp))
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return pgd;
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/*
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* The user page tables get the full PGD, accessible from
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* userspace:
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*/
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kernel_to_user_pgdp(pgdp)->pgd = pgd.pgd;
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/*
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* If this is normal user memory, make it NX in the kernel
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* pagetables so that, if we somehow screw up and return to
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* usermode with the kernel CR3 loaded, we'll get a page fault
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* instead of allowing user code to execute with the wrong CR3.
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*
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* As exceptions, we don't set NX if:
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* - _PAGE_USER is not set. This could be an executable
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* EFI runtime mapping or something similar, and the kernel
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* may execute from it
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* - we don't have NX support
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* - we're clearing the PGD (i.e. the new pgd is not present).
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*/
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if ((pgd.pgd & (_PAGE_USER|_PAGE_PRESENT)) == (_PAGE_USER|_PAGE_PRESENT) &&
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(__supported_pte_mask & _PAGE_NX))
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pgd.pgd |= _PAGE_NX;
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/* return the copy of the PGD we want the kernel to use: */
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return pgd;
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}
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/*
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* Initialize kernel page table isolation
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*/
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