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xtensa: add missing isync to the cpu_reset TLB code
commit cd8869f4cb
upstream.
ITLB entry modifications must be followed by the isync instruction
before the new entries are possibly used. cpu_reset lacks one isync
between ITLB way 6 initialization and jump to the identity mapping.
Add missing isync to xtensa cpu_reset.
Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -515,6 +515,7 @@ void cpu_reset(void)
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"add %2, %2, %7\n\t"
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"addi %0, %0, -1\n\t"
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"bnez %0, 1b\n\t"
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"isync\n\t"
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/* Jump to identity mapping */
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"jx %3\n"
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"2:\n\t"
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