mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 19:00:25 +00:00
spi: spi_bfin: update handling of delay-after-deselect
Move cs_chg_udelay handling (specific to this driver) to cs_deactive(), fixing a bug when some SPI LCD driver needs delay after cs_deactive. Fix bug reported by Cameron Barfield <cbarfield@cyberdata.net> https://blackfin.uclinux.org/gf/project/uclinux-dist/forum/?action=ForumBrowse&forum_id=39&_forum_action=ForumMessageBrowse&thread_id=23630&feedback=Message%20replied. Cc: Cameron Barfield <cbarfield@cyberdata.net> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
c3061abb9e
commit
62310e51ac
2 changed files with 10 additions and 16 deletions
|
@ -132,7 +132,7 @@ struct chip_data {
|
||||||
u8 enable_dma;
|
u8 enable_dma;
|
||||||
u8 bits_per_word; /* 8 or 16 */
|
u8 bits_per_word; /* 8 or 16 */
|
||||||
u8 cs_change_per_word;
|
u8 cs_change_per_word;
|
||||||
u8 cs_chg_udelay;
|
u16 cs_chg_udelay; /* Some devices require > 255usec delay */
|
||||||
void (*write) (struct driver_data *);
|
void (*write) (struct driver_data *);
|
||||||
void (*read) (struct driver_data *);
|
void (*read) (struct driver_data *);
|
||||||
void (*duplex) (struct driver_data *);
|
void (*duplex) (struct driver_data *);
|
||||||
|
@ -211,6 +211,10 @@ static void cs_deactive(struct driver_data *drv_data, struct chip_data *chip)
|
||||||
flag |= (chip->flag << 8);
|
flag |= (chip->flag << 8);
|
||||||
|
|
||||||
write_FLAG(drv_data, flag);
|
write_FLAG(drv_data, flag);
|
||||||
|
|
||||||
|
/* Move delay here for consistency */
|
||||||
|
if (chip->cs_chg_udelay)
|
||||||
|
udelay(chip->cs_chg_udelay);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define MAX_SPI_SSEL 7
|
#define MAX_SPI_SSEL 7
|
||||||
|
@ -307,10 +311,9 @@ static void u8_cs_chg_writer(struct driver_data *drv_data)
|
||||||
write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
|
write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
|
||||||
while (read_STAT(drv_data) & BIT_STAT_TXS)
|
while (read_STAT(drv_data) & BIT_STAT_TXS)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
cs_deactive(drv_data, chip);
|
cs_deactive(drv_data, chip);
|
||||||
|
|
||||||
if (chip->cs_chg_udelay)
|
|
||||||
udelay(chip->cs_chg_udelay);
|
|
||||||
++drv_data->tx;
|
++drv_data->tx;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -359,9 +362,6 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
|
||||||
while (drv_data->rx < drv_data->rx_end - 1) {
|
while (drv_data->rx < drv_data->rx_end - 1) {
|
||||||
cs_deactive(drv_data, chip);
|
cs_deactive(drv_data, chip);
|
||||||
|
|
||||||
if (chip->cs_chg_udelay)
|
|
||||||
udelay(chip->cs_chg_udelay);
|
|
||||||
|
|
||||||
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
||||||
continue;
|
continue;
|
||||||
cs_active(drv_data, chip);
|
cs_active(drv_data, chip);
|
||||||
|
@ -412,10 +412,9 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data)
|
||||||
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
||||||
continue;
|
continue;
|
||||||
*(u8 *) (drv_data->rx) = read_RDBR(drv_data);
|
*(u8 *) (drv_data->rx) = read_RDBR(drv_data);
|
||||||
|
|
||||||
cs_deactive(drv_data, chip);
|
cs_deactive(drv_data, chip);
|
||||||
|
|
||||||
if (chip->cs_chg_udelay)
|
|
||||||
udelay(chip->cs_chg_udelay);
|
|
||||||
++drv_data->rx;
|
++drv_data->rx;
|
||||||
++drv_data->tx;
|
++drv_data->tx;
|
||||||
}
|
}
|
||||||
|
@ -452,10 +451,9 @@ static void u16_cs_chg_writer(struct driver_data *drv_data)
|
||||||
write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
|
write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
|
||||||
while ((read_STAT(drv_data) & BIT_STAT_TXS))
|
while ((read_STAT(drv_data) & BIT_STAT_TXS))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
cs_deactive(drv_data, chip);
|
cs_deactive(drv_data, chip);
|
||||||
|
|
||||||
if (chip->cs_chg_udelay)
|
|
||||||
udelay(chip->cs_chg_udelay);
|
|
||||||
drv_data->tx += 2;
|
drv_data->tx += 2;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -504,9 +502,6 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
|
||||||
while (drv_data->rx < drv_data->rx_end - 2) {
|
while (drv_data->rx < drv_data->rx_end - 2) {
|
||||||
cs_deactive(drv_data, chip);
|
cs_deactive(drv_data, chip);
|
||||||
|
|
||||||
if (chip->cs_chg_udelay)
|
|
||||||
udelay(chip->cs_chg_udelay);
|
|
||||||
|
|
||||||
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
||||||
continue;
|
continue;
|
||||||
cs_active(drv_data, chip);
|
cs_active(drv_data, chip);
|
||||||
|
@ -557,10 +552,9 @@ static void u16_cs_chg_duplex(struct driver_data *drv_data)
|
||||||
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
||||||
continue;
|
continue;
|
||||||
*(u16 *) (drv_data->rx) = read_RDBR(drv_data);
|
*(u16 *) (drv_data->rx) = read_RDBR(drv_data);
|
||||||
|
|
||||||
cs_deactive(drv_data, chip);
|
cs_deactive(drv_data, chip);
|
||||||
|
|
||||||
if (chip->cs_chg_udelay)
|
|
||||||
udelay(chip->cs_chg_udelay);
|
|
||||||
drv_data->rx += 2;
|
drv_data->rx += 2;
|
||||||
drv_data->tx += 2;
|
drv_data->tx += 2;
|
||||||
}
|
}
|
||||||
|
|
|
@ -162,7 +162,7 @@ struct bfin5xx_spi_chip {
|
||||||
u8 enable_dma;
|
u8 enable_dma;
|
||||||
u8 bits_per_word;
|
u8 bits_per_word;
|
||||||
u8 cs_change_per_word;
|
u8 cs_change_per_word;
|
||||||
u8 cs_chg_udelay;
|
u16 cs_chg_udelay; /* Some devices require 16-bit delays */
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif /* _SPI_CHANNEL_H_ */
|
#endif /* _SPI_CHANNEL_H_ */
|
||||||
|
|
Loading…
Reference in a new issue