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dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
For most devices the FIFO configuration is the same i.e. when half FIFO size is available/filled, a source/destination request is serviced. But USART devices have to do it when there is enough space/data available to perform a single AHB access so the ASAP configuration. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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2 changed files with 26 additions and 6 deletions
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@ -24,8 +24,11 @@ The three cells in order are:
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1. A phandle pointing to the DMA controller.
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2. The memory interface (16 most significant bits), the peripheral interface
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(16 less significant bits).
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3. The peripheral identifier for the hardware handshaking interface. The
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identifier can be different for tx and rx.
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3. Parameters for the at91 DMA configuration register which are device
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dependant:
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- bit 7-0: peripheral identifier for the hardware handshaking interface. The
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identifier can be different for tx and rx.
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- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.
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Example:
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@ -14,6 +14,7 @@
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* found on AT91SAM9263.
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*/
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#include <dt-bindings/dma/at91.h>
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#include <linux/clk.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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@ -1320,15 +1321,31 @@ static struct dma_chan *at_dma_xlate(struct of_phandle_args *dma_spec,
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atslave = devm_kzalloc(&dmac_pdev->dev, sizeof(*atslave), GFP_KERNEL);
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if (!atslave)
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return NULL;
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atslave->cfg = ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW;
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/*
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* We can fill both SRC_PER and DST_PER, one of these fields will be
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* ignored depending on DMA transfer direction.
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*/
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per_id = dma_spec->args[1];
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atslave->cfg = ATC_FIFOCFG_HALFFIFO
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| ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW
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| ATC_DST_PER_MSB(per_id) | ATC_DST_PER(per_id)
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per_id = dma_spec->args[1] & AT91_DMA_CFG_PER_ID_MASK;
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atslave->cfg |= ATC_DST_PER_MSB(per_id) | ATC_DST_PER(per_id)
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| ATC_SRC_PER_MSB(per_id) | ATC_SRC_PER(per_id);
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/*
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* We have to translate the value we get from the device tree since
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* the half FIFO configuration value had to be 0 to keep backward
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* compatibility.
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*/
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switch (dma_spec->args[1] & AT91_DMA_CFG_FIFOCFG_MASK) {
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case AT91_DMA_CFG_FIFOCFG_ALAP:
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atslave->cfg |= ATC_FIFOCFG_LARGESTBURST;
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break;
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case AT91_DMA_CFG_FIFOCFG_ASAP:
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atslave->cfg |= ATC_FIFOCFG_ENOUGHSPACE;
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break;
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case AT91_DMA_CFG_FIFOCFG_HALF:
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default:
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atslave->cfg |= ATC_FIFOCFG_HALFFIFO;
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}
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atslave->dma_dev = &dmac_pdev->dev;
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chan = dma_request_channel(mask, at_dma_filter, atslave);
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