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natsemi: Update locking documentation
The documentation regarding synchronisation at the head of the natsemi driver was badly bitrotted so replace it with a general statement about the techniques used which is less likely to bitrot. Also remove the note saying these chips are uncommon - it makes little difference but they were used in a number of laptops and at least one mass market PCI ethernet card. Signed-off-by: Mark Brown <broonie@sirena.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 2 additions and 16 deletions
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@ -203,22 +203,8 @@ skbuff at an offset of "+2", 16-byte aligning the IP header.
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IIId. Synchronization
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Most operations are synchronized on the np->lock irq spinlock, except the
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performance critical codepaths:
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The rx process only runs in the interrupt handler. Access from outside
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the interrupt handler is only permitted after disable_irq().
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The rx process usually runs under the netif_tx_lock. If np->intr_tx_reap
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is set, then access is permitted under spin_lock_irq(&np->lock).
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Thus configuration functions that want to access everything must call
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disable_irq(dev->irq);
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netif_tx_lock_bh(dev);
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spin_lock_irq(&np->lock);
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IV. Notes
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NatSemi PCI network controllers are very uncommon.
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recieve and transmit paths which are synchronised using a combination of
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hardware descriptor ownership, disabling interrupts and NAPI poll scheduling.
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IVb. References
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