[S390] virtual cpu accounting vs. machine checks.
If a machine checks interrupts the external or the i/o interrupt handler before they have completed the cpu time calculations, the accounting goes wrong. After the cpu returned from the machine check handler to the interrupted interrupt handler, a negative cpu time delta can occur. If the accumulated cpu time in lowcore is small enough this value can get negative as well. The next jiffy interrupt will pick up that negative value, shift it by 12 and add the now huge positive value to the cpu time of the process. To solve this the machine check handler is modified not to change any of the timestamps in the lowcore if the machine check interrupted kernel context. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Martin Schwidefsky
parent
9faf06547e
commit
63b1224664
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@ -93,13 +93,22 @@ STACK_SIZE = 1 << STACK_SHIFT
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l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
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.endm
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.macro SAVE_ALL psworg,savearea,sync
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.macro SAVE_ALL_SYNC psworg,savearea
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la %r12,\psworg
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.if \sync
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tm \psworg+1,0x01 # test problem state bit
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bz BASED(2f) # skip stack setup save
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l %r15,__LC_KERNEL_STACK # problem state -> load ksp
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.else
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#ifdef CONFIG_CHECK_STACK
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b BASED(3f)
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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bz BASED(stack_overflow)
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3:
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#endif
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2:
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.endm
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.macro SAVE_ALL_ASYNC psworg,savearea
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la %r12,\psworg
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tm \psworg+1,0x01 # test problem state bit
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bnz BASED(1f) # from user -> load async stack
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clc \psworg+4(4),BASED(.Lcritical_end)
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@ -115,7 +124,6 @@ STACK_SIZE = 1 << STACK_SHIFT
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sra %r14,STACK_SHIFT
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be BASED(2f)
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1: l %r15,__LC_ASYNC_STACK
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.endif
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#ifdef CONFIG_CHECK_STACK
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b BASED(3f)
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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@ -196,7 +204,7 @@ system_call:
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STORE_TIMER __LC_SYNC_ENTER_TIMER
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sysc_saveall:
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SAVE_ALL_BASE __LC_SAVE_AREA
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SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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lh %r7,0x8a # get svc number from lowcore
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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@ -425,7 +433,7 @@ pgm_check_handler:
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SAVE_ALL_BASE __LC_SAVE_AREA
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tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
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bnz BASED(pgm_per) # got per exception -> special case
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SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -464,7 +472,7 @@ pgm_per:
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# Normal per exception
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#
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pgm_per_std:
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SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -490,7 +498,7 @@ pgm_no_vtime2:
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# it was a single stepped SVC that is causing all the trouble
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#
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pgm_svcper:
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SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -519,7 +527,7 @@ io_int_handler:
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STORE_TIMER __LC_ASYNC_ENTER_TIMER
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stck __LC_INT_CLOCK
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SAVE_ALL_BASE __LC_SAVE_AREA+16
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SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0
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SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
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CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -631,7 +639,7 @@ ext_int_handler:
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STORE_TIMER __LC_ASYNC_ENTER_TIMER
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stck __LC_INT_CLOCK
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SAVE_ALL_BASE __LC_SAVE_AREA+16
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SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0
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SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
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CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -657,21 +665,31 @@ __critical_end:
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.globl mcck_int_handler
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mcck_int_handler:
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spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
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lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
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SAVE_ALL_BASE __LC_SAVE_AREA+32
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la %r12,__LC_MCK_OLD_PSW
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tm __LC_MCCK_CODE,0x80 # system damage?
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bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
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tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
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bo BASED(0f)
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spt __LC_LAST_UPDATE_TIMER # revalidate cpu timer
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
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mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
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mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
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mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
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tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
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bo BASED(1f)
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la %r14,__LC_SYNC_ENTER_TIMER
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clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
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bl BASED(0f)
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la %r14,__LC_ASYNC_ENTER_TIMER
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0: clc 0(8,%r14),__LC_EXIT_TIMER
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bl BASED(0f)
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la %r14,__LC_EXIT_TIMER
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0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
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bl BASED(0f)
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la %r14,__LC_LAST_UPDATE_TIMER
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0: spt 0(%r14)
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mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
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1:
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#endif
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0: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
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tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
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bno BASED(mcck_int_main) # no -> skip cleanup critical
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tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
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bnz BASED(mcck_int_main) # from user -> load async stack
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@ -691,7 +709,7 @@ mcck_int_main:
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
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bno BASED(mcck_no_vtime) # no -> skip cleanup critical
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tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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bz BASED(mcck_no_vtime)
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UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
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UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
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@ -715,6 +733,20 @@ mcck_no_vtime:
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l %r1,BASED(.Ls390_handle_mcck)
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basr %r14,%r1 # call machine check handler
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mcck_return:
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mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
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ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
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tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
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bno BASED(0f)
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lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
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stpt __LC_EXIT_TIMER
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lpsw __LC_RETURN_MCCK_PSW # back to caller
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0:
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#endif
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lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
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lpsw __LC_RETURN_MCCK_PSW # back to caller
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RESTORE_ALL __LC_RETURN_MCCK_PSW,0
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#ifdef CONFIG_SMP
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@ -781,6 +813,8 @@ cleanup_table_sysc_leave:
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.long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
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cleanup_table_sysc_work_loop:
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.long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
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cleanup_table_io_return:
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.long io_return + 0x80000000, io_leave + 0x80000000
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cleanup_table_io_leave:
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.long io_leave + 0x80000000, io_done + 0x80000000
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cleanup_table_io_work_loop:
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@ -806,6 +840,11 @@ cleanup_critical:
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bl BASED(0f)
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clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
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bl BASED(cleanup_sysc_return)
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0:
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clc 4(4,%r12),BASED(cleanup_table_io_return)
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bl BASED(0f)
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clc 4(4,%r12),BASED(cleanup_table_io_return+4)
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bl BASED(cleanup_io_return)
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0:
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clc 4(4,%r12),BASED(cleanup_table_io_leave)
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bl BASED(0f)
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@ -839,7 +878,7 @@ cleanup_system_call:
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mvc __LC_SAVE_AREA(16),0(%r12)
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0: st %r13,4(%r12)
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st %r12,__LC_SAVE_AREA+48 # argh
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SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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l %r12,__LC_SAVE_AREA+48 # argh
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st %r15,12(%r12)
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@ -87,13 +87,22 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
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larl %r13,system_call
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.endm
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.macro SAVE_ALL psworg,savearea,sync
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.macro SAVE_ALL_SYNC psworg,savearea
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la %r12,\psworg
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.if \sync
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tm \psworg+1,0x01 # test problem state bit
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jz 2f # skip stack setup save
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lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
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.else
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#ifdef CONFIG_CHECK_STACK
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j 3f
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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jz stack_overflow
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3:
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#endif
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2:
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.endm
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.macro SAVE_ALL_ASYNC psworg,savearea
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la %r12,\psworg
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tm \psworg+1,0x01 # test problem state bit
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jnz 1f # from user -> load kernel stack
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clc \psworg+8(8),BASED(.Lcritical_end)
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@ -108,7 +117,6 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
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srag %r14,%r14,STACK_SHIFT
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jz 2f
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1: lg %r15,__LC_ASYNC_STACK # load async stack
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.endif
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#ifdef CONFIG_CHECK_STACK
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j 3f
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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@ -187,7 +195,7 @@ system_call:
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STORE_TIMER __LC_SYNC_ENTER_TIMER
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sysc_saveall:
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SAVE_ALL_BASE __LC_SAVE_AREA
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SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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@ -446,7 +454,7 @@ pgm_check_handler:
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SAVE_ALL_BASE __LC_SAVE_AREA
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tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
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jnz pgm_per # got per exception -> special case
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SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -485,7 +493,7 @@ pgm_per:
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# Normal per exception
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#
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pgm_per_std:
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SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -511,7 +519,7 @@ pgm_no_vtime2:
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# it was a single stepped SVC that is causing all the trouble
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#
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pgm_svcper:
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SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
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SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -539,7 +547,7 @@ io_int_handler:
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STORE_TIMER __LC_ASYNC_ENTER_TIMER
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stck __LC_INT_CLOCK
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SAVE_ALL_BASE __LC_SAVE_AREA+32
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SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
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SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
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CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -647,7 +655,7 @@ ext_int_handler:
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STORE_TIMER __LC_ASYNC_ENTER_TIMER
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stck __LC_INT_CLOCK
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SAVE_ALL_BASE __LC_SAVE_AREA+32
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SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
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SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
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CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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@ -672,21 +680,32 @@ __critical_end:
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mcck_int_handler:
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la %r1,4095 # revalidate r1
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spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r1)
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lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
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SAVE_ALL_BASE __LC_SAVE_AREA+64
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la %r12,__LC_MCK_OLD_PSW
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tm __LC_MCCK_CODE,0x80 # system damage?
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jo mcck_int_main # yes -> rest of mcck code invalid
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tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
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jo 0f
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spt __LC_LAST_UPDATE_TIMER
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
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mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
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mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
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la %r14,4095
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mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
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mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
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tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
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jo 1f
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la %r14,__LC_SYNC_ENTER_TIMER
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clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
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jl 0f
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la %r14,__LC_ASYNC_ENTER_TIMER
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0: clc 0(8,%r14),__LC_EXIT_TIMER
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jl 0f
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la %r14,__LC_EXIT_TIMER
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0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
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jl 0f
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la %r14,__LC_LAST_UPDATE_TIMER
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0: spt 0(%r14)
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mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
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1:
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#endif
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0: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
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tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
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jno mcck_int_main # no -> skip cleanup critical
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tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
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jnz mcck_int_main # from user -> load kernel stack
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@ -705,7 +724,7 @@ mcck_int_main:
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|||
#ifdef CONFIG_VIRT_CPU_ACCOUNTING
|
||||
tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
|
||||
jno mcck_no_vtime # no -> no timer update
|
||||
tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
|
||||
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
||||
jz mcck_no_vtime
|
||||
UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
|
||||
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
||||
|
|
@ -727,7 +746,17 @@ mcck_no_vtime:
|
|||
jno mcck_return
|
||||
brasl %r14,s390_handle_mcck
|
||||
mcck_return:
|
||||
RESTORE_ALL __LC_RETURN_MCCK_PSW,0
|
||||
mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
|
||||
ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
|
||||
lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
|
||||
#ifdef CONFIG_VIRT_CPU_ACCOUNTING
|
||||
mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
|
||||
tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
|
||||
jno 0f
|
||||
stpt __LC_EXIT_TIMER
|
||||
0:
|
||||
#endif
|
||||
lpswe __LC_RETURN_MCCK_PSW # back to caller
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/*
|
||||
|
|
@ -789,6 +818,8 @@ cleanup_table_sysc_leave:
|
|||
.quad sysc_leave, sysc_work_loop
|
||||
cleanup_table_sysc_work_loop:
|
||||
.quad sysc_work_loop, sysc_reschedule
|
||||
cleanup_table_io_return:
|
||||
.quad io_return, io_leave
|
||||
cleanup_table_io_leave:
|
||||
.quad io_leave, io_done
|
||||
cleanup_table_io_work_loop:
|
||||
|
|
@ -814,6 +845,11 @@ cleanup_critical:
|
|||
jl 0f
|
||||
clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
|
||||
jl cleanup_sysc_return
|
||||
0:
|
||||
clc 8(8,%r12),BASED(cleanup_table_io_return)
|
||||
jl 0f
|
||||
clc 8(8,%r12),BASED(cleanup_table_io_return+8)
|
||||
jl cleanup_io_return
|
||||
0:
|
||||
clc 8(8,%r12),BASED(cleanup_table_io_leave)
|
||||
jl 0f
|
||||
|
|
@ -847,7 +883,7 @@ cleanup_system_call:
|
|||
mvc __LC_SAVE_AREA(32),0(%r12)
|
||||
0: stg %r13,8(%r12)
|
||||
stg %r12,__LC_SAVE_AREA+96 # argh
|
||||
SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
|
||||
SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
lg %r12,__LC_SAVE_AREA+96 # argh
|
||||
stg %r15,24(%r12)
|
||||
|
|
|
|||
Loading…
Reference in New Issue