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clk: sunxi: rewrite sun9i_a80_get_pll4_factors()
The old implementation of sun9i_a80_get_pll4_factors() has several issues, it checks against 256 / 512 in various places where it should use 255 / 511, it does the wrong thing for low frequencies which are an even multiple of 6 MHz, e.g. if you ask it for 72 MHz it will result in 144 Mhz, and it does not take into account that n must be at least 12. Moreover it is quite hard to read / follow it. This commit rewrites it to be correct in all cases, and makes it much easier to follow the code / to read. Cc: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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1 changed files with 29 additions and 28 deletions
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@ -24,50 +24,51 @@
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/**
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* sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL1
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* sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL4
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* PLL4 rate is calculated as follows
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* rate = (parent_rate * n >> p) / (m + 1);
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* parent_rate is always 24Mhz
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* parent_rate is always 24MHz
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*
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* p and m are named div1 and div2 in Allwinner's SDK
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*/
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static void sun9i_a80_get_pll4_factors(u32 *freq, u32 parent_rate,
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u8 *n, u8 *k, u8 *m, u8 *p)
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u8 *n_ret, u8 *k, u8 *m_ret, u8 *p_ret)
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{
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int div;
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int n;
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int m = 1;
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int p = 1;
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/* Normalize value to a 6M multiple */
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div = DIV_ROUND_UP(*freq, 6000000);
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/* Normalize value to a 6 MHz multiple (24 MHz / 4) */
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n = DIV_ROUND_UP(*freq, 6000000);
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/* divs above 256 cannot be odd */
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if (div > 256)
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div = round_up(div, 2);
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/* If n is too large switch to steps of 12 MHz */
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if (n > 255) {
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m = 0;
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n = (n + 1) / 2;
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}
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/* divs above 512 must be a multiple of 4 */
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if (div > 512)
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div = round_up(div, 4);
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/* If n is still too large switch to steps of 24 MHz */
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if (n > 255) {
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p = 0;
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n = (n + 1) / 2;
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}
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*freq = 6000000 * div;
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/* n must be between 12 and 255 */
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if (n > 255)
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n = 255;
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else if (n < 12)
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n = 12;
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*freq = ((24000000 * n) >> p) / (m + 1);
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/* we were called to round the frequency, we can now return */
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if (n == NULL)
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if (n_ret == NULL)
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return;
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/* p will be 1 for divs under 512 */
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if (div < 512)
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*p = 1;
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else
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*p = 0;
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/* m will be 1 if div is odd */
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if (div & 1)
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*m = 1;
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else
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*m = 0;
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/* calculate a suitable n based on m and p */
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*n = div / (*p + 1) / (*m + 1);
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*n_ret = n;
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*m_ret = m;
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*p_ret = p;
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}
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static struct clk_factors_config sun9i_a80_pll4_config = {
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