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mtd: lpc32xx_mlc: fix warnings caused by enabling unprepared clock
If common clock framework is configured, the driver generates a warning, which is fixed by this change: WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:727 clk_core_enable+0x2c/0xa4() Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.3.0-rc2+ #206 Hardware name: LPC32XX SoC (Flattened Device Tree) Backtrace: [<>] (dump_backtrace) from [<>] (show_stack+0x18/0x1c) [<>] (show_stack) from [<>] (dump_stack+0x20/0x28) [<>] (dump_stack) from [<>] (warn_slowpath_common+0x90/0xb8) [<>] (warn_slowpath_common) from [<>] (warn_slowpath_null+0x24/0x2c) [<>] (warn_slowpath_null) from [<>] (clk_core_enable+0x2c/0xa4) [<>] (clk_core_enable) from [<>] (clk_enable+0x24/0x38) [<>] (clk_enable) from [<>] (lpc32xx_nand_probe+0x208/0x248) [<>] (lpc32xx_nand_probe) from [<>] (platform_drv_probe+0x50/0xa0) [<>] (platform_drv_probe) from [<>] (driver_probe_device+0x18c/0x408) [<>] (driver_probe_device) from [<>] (__driver_attach+0x70/0x94) [<>] (__driver_attach) from [<>] (bus_for_each_dev+0x74/0x98) [<>] (bus_for_each_dev) from [<>] (driver_attach+0x20/0x28) [<>] (driver_attach) from [<>] (bus_add_driver+0x11c/0x248) [<>] (bus_add_driver) from [<>] (driver_register+0xa4/0xe8) [<>] (driver_register) from [<>] (__platform_driver_register+0x50/0x64) [<>] (__platform_driver_register) from [<>] (lpc32xx_nand_driver_init+0x18/0x20) [<>] (lpc32xx_nand_driver_init) from [<>] (do_one_initcall+0x11c/0x1dc) [<>] (do_one_initcall) from [<>] (kernel_init_freeable+0x10c/0x1d4) [<>] (kernel_init_freeable) from [<>] (kernel_init+0x10/0xec) [<>] (kernel_init) from [<>] (ret_from_fork+0x14/0x24) Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
parent
44cab9c930
commit
64862dbc98
1 changed files with 5 additions and 5 deletions
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@ -692,7 +692,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
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res = -ENOENT;
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goto err_exit1;
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}
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clk_enable(host->clk);
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clk_prepare_enable(host->clk);
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nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl;
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nand_chip->dev_ready = lpc32xx_nand_device_ready;
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@ -800,7 +800,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
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if (use_dma)
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dma_release_channel(host->dma_chan);
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err_exit2:
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clk_disable(host->clk);
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clk_disable_unprepare(host->clk);
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clk_put(host->clk);
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err_exit1:
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lpc32xx_wp_enable(host);
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@ -822,7 +822,7 @@ static int lpc32xx_nand_remove(struct platform_device *pdev)
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if (use_dma)
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dma_release_channel(host->dma_chan);
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clk_disable(host->clk);
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clk_disable_unprepare(host->clk);
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clk_put(host->clk);
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lpc32xx_wp_enable(host);
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@ -837,7 +837,7 @@ static int lpc32xx_nand_resume(struct platform_device *pdev)
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struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
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/* Re-enable NAND clock */
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clk_enable(host->clk);
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clk_prepare_enable(host->clk);
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/* Fresh init of NAND controller */
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lpc32xx_nand_setup(host);
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@ -856,7 +856,7 @@ static int lpc32xx_nand_suspend(struct platform_device *pdev, pm_message_t pm)
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lpc32xx_wp_enable(host);
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/* Disable clock */
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clk_disable(host->clk);
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clk_disable_unprepare(host->clk);
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return 0;
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}
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