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ARM: 6387/1: errata: check primary part ID in proc-v7.S
Kconfig doesn't have any knowledge of specific v7 cores, so it is possible to select errata workarounds that may cause inadvertent behaviour when executed on a core other than those targetted by the fix. This patch improves the variant and revision checking in proc-v7.S so that the primary part number is also considered when applying errata workarounds. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 8 additions and 3 deletions
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@ -204,8 +204,13 @@ __v7_setup:
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bne 2f
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bne 2f
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and r5, r0, #0x00f00000 @ variant
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and r5, r0, #0x00f00000 @ variant
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and r6, r0, #0x0000000f @ revision
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and r6, r0, #0x0000000f @ revision
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orr r0, r6, r5, lsr #20-4 @ combine variant and revision
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orr r6, r6, r5, lsr #20-4 @ combine variant and revision
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ubfx r0, r0, #4, #12 @ primary part number
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/* Cortex-A8 Errata */
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ldr r10, =0x00000c08 @ Cortex-A8 primary part number
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teq r0, r10
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bne 2f
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#ifdef CONFIG_ARM_ERRATA_430973
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#ifdef CONFIG_ARM_ERRATA_430973
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teq r5, #0x00100000 @ only present in r1p*
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teq r5, #0x00100000 @ only present in r1p*
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mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
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mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
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@ -213,14 +218,14 @@ __v7_setup:
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mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
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mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
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#endif
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#endif
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#ifdef CONFIG_ARM_ERRATA_458693
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#ifdef CONFIG_ARM_ERRATA_458693
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teq r0, #0x20 @ only present in r2p0
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teq r6, #0x20 @ only present in r2p0
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mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
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mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
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orreq r10, r10, #(1 << 5) @ set L1NEON to 1
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orreq r10, r10, #(1 << 5) @ set L1NEON to 1
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orreq r10, r10, #(1 << 9) @ set PLDNOP to 1
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orreq r10, r10, #(1 << 9) @ set PLDNOP to 1
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mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
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mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
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#endif
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#endif
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#ifdef CONFIG_ARM_ERRATA_460075
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#ifdef CONFIG_ARM_ERRATA_460075
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teq r0, #0x20 @ only present in r2p0
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teq r6, #0x20 @ only present in r2p0
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mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register
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mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register
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tsteq r10, #1 << 22
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tsteq r10, #1 << 22
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orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit
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orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit
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