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clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
In order to achieve all the rates asked by the GPU, we might need to change the parent frequency. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Chen-Yu Tsai <wens@csie.org>
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@ -468,7 +468,7 @@ static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(drc_clk, "drc",
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0x180, 0, 4, 24, 3, BIT(31), 0);
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static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
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0x1a0, 0, 3, BIT(31), 0);
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0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
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static const char * const ats_parents[] = { "osc24M", "pll-periph" };
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static SUNXI_CCU_M_WITH_MUX_GATE(ats_clk, "ats", ats_parents,
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