mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 17:30:02 +00:00
sfc: Add filter table management
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
a77f5db361
commit
64eebcfd89
7 changed files with 678 additions and 1 deletions
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@ -1,4 +1,4 @@
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sfc-y += efx.o nic.o falcon.o siena.o tx.o rx.o \
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sfc-y += efx.o nic.o falcon.o siena.o tx.o rx.o filter.o \
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falcon_gmac.o falcon_xmac.o mcdi_mac.o \
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selftest.o ethtool.o qt202x_phy.o mdio_10g.o \
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tenxpress.o falcon_boards.o mcdi.o mcdi_phy.o
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@ -1357,8 +1357,17 @@ static int efx_probe_all(struct efx_nic *efx)
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if (rc)
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goto fail3;
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rc = efx_probe_filters(efx);
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if (rc) {
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netif_err(efx, probe, efx->net_dev,
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"failed to create filter tables\n");
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goto fail4;
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}
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return 0;
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fail4:
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efx_remove_channels(efx);
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fail3:
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efx_remove_port(efx);
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fail2:
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@ -1489,6 +1498,7 @@ static void efx_stop_all(struct efx_nic *efx)
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static void efx_remove_all(struct efx_nic *efx)
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{
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efx_remove_filters(efx);
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efx_remove_channels(efx);
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efx_remove_port(efx);
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efx_remove_nic(efx);
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@ -2002,6 +2012,7 @@ int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
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efx->mac_op->reconfigure(efx);
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efx_init_channels(efx);
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efx_restore_filters(efx);
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mutex_unlock(&efx->spi_lock);
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mutex_unlock(&efx->mac_lock);
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@ -12,6 +12,7 @@
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#define EFX_EFX_H
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#include "net_driver.h"
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#include "filter.h"
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/* PCI IDs */
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#define EFX_VENDID_SFC 0x1924
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@ -64,6 +65,19 @@ extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue);
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* skb. Falcon/A1 may require up to three descriptors per skb_frag. */
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#define EFX_MIN_RING_SIZE (roundup_pow_of_two(2 * 3 * MAX_SKB_FRAGS))
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/* Filters */
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extern int efx_probe_filters(struct efx_nic *efx);
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extern void efx_restore_filters(struct efx_nic *efx);
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extern void efx_remove_filters(struct efx_nic *efx);
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extern int efx_filter_insert_filter(struct efx_nic *efx,
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struct efx_filter_spec *spec,
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bool replace);
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extern int efx_filter_remove_filter(struct efx_nic *efx,
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struct efx_filter_spec *spec);
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extern void efx_filter_table_clear(struct efx_nic *efx,
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enum efx_filter_table_id table_id,
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enum efx_filter_priority priority);
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/* Channels */
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extern void efx_process_channel_now(struct efx_channel *channel);
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extern int
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445
drivers/net/sfc/filter.c
Normal file
445
drivers/net/sfc/filter.c
Normal file
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@ -0,0 +1,445 @@
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/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2005-2010 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include "efx.h"
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#include "filter.h"
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#include "io.h"
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#include "nic.h"
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#include "regs.h"
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/* "Fudge factors" - difference between programmed value and actual depth.
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* Due to pipelined implementation we need to program H/W with a value that
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* is larger than the hop limit we want.
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*/
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#define FILTER_CTL_SRCH_FUDGE_WILD 3
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#define FILTER_CTL_SRCH_FUDGE_FULL 1
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struct efx_filter_table {
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u32 offset; /* address of table relative to BAR */
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unsigned size; /* number of entries */
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unsigned step; /* step between entries */
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unsigned used; /* number currently used */
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unsigned long *used_bitmap;
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struct efx_filter_spec *spec;
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};
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struct efx_filter_state {
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spinlock_t lock;
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struct efx_filter_table table[EFX_FILTER_TABLE_COUNT];
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unsigned search_depth[EFX_FILTER_TYPE_COUNT];
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};
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/* The filter hash function is LFSR polynomial x^16 + x^3 + 1 of a 32-bit
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* key derived from the n-tuple. The initial LFSR state is 0xffff. */
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static u16 efx_filter_hash(u32 key)
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{
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u16 tmp;
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/* First 16 rounds */
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tmp = 0x1fff ^ key >> 16;
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tmp = tmp ^ tmp >> 3 ^ tmp >> 6;
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tmp = tmp ^ tmp >> 9;
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/* Last 16 rounds */
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tmp = tmp ^ tmp << 13 ^ key;
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tmp = tmp ^ tmp >> 3 ^ tmp >> 6;
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return tmp ^ tmp >> 9;
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}
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/* To allow for hash collisions, filter search continues at these
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* increments from the first possible entry selected by the hash. */
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static u16 efx_filter_increment(u32 key)
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{
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return key * 2 - 1;
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}
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static enum efx_filter_table_id
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efx_filter_type_table_id(enum efx_filter_type type)
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{
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BUILD_BUG_ON(EFX_FILTER_TABLE_RX_IP != (EFX_FILTER_RX_TCP_FULL >> 2));
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BUILD_BUG_ON(EFX_FILTER_TABLE_RX_IP != (EFX_FILTER_RX_TCP_WILD >> 2));
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BUILD_BUG_ON(EFX_FILTER_TABLE_RX_IP != (EFX_FILTER_RX_UDP_FULL >> 2));
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BUILD_BUG_ON(EFX_FILTER_TABLE_RX_IP != (EFX_FILTER_RX_UDP_WILD >> 2));
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BUILD_BUG_ON(EFX_FILTER_TABLE_RX_MAC != (EFX_FILTER_RX_MAC_FULL >> 2));
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BUILD_BUG_ON(EFX_FILTER_TABLE_RX_MAC != (EFX_FILTER_RX_MAC_WILD >> 2));
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return type >> 2;
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}
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static void
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efx_filter_table_reset_search_depth(struct efx_filter_state *state,
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enum efx_filter_table_id table_id)
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{
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memset(state->search_depth + (table_id << 2), 0,
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sizeof(state->search_depth[0]) << 2);
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}
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static void efx_filter_push_rx_limits(struct efx_nic *efx)
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{
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struct efx_filter_state *state = efx->filter_state;
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efx_oword_t filter_ctl;
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efx_reado(efx, &filter_ctl, FR_BZ_RX_FILTER_CTL);
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EFX_SET_OWORD_FIELD(filter_ctl, FRF_BZ_TCP_FULL_SRCH_LIMIT,
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state->search_depth[EFX_FILTER_RX_TCP_FULL] +
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FILTER_CTL_SRCH_FUDGE_FULL);
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EFX_SET_OWORD_FIELD(filter_ctl, FRF_BZ_TCP_WILD_SRCH_LIMIT,
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state->search_depth[EFX_FILTER_RX_TCP_WILD] +
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FILTER_CTL_SRCH_FUDGE_WILD);
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EFX_SET_OWORD_FIELD(filter_ctl, FRF_BZ_UDP_FULL_SRCH_LIMIT,
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state->search_depth[EFX_FILTER_RX_UDP_FULL] +
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FILTER_CTL_SRCH_FUDGE_FULL);
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EFX_SET_OWORD_FIELD(filter_ctl, FRF_BZ_UDP_WILD_SRCH_LIMIT,
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state->search_depth[EFX_FILTER_RX_UDP_WILD] +
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FILTER_CTL_SRCH_FUDGE_WILD);
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if (state->table[EFX_FILTER_TABLE_RX_MAC].size) {
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EFX_SET_OWORD_FIELD(
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filter_ctl, FRF_CZ_ETHERNET_FULL_SEARCH_LIMIT,
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state->search_depth[EFX_FILTER_RX_MAC_FULL] +
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FILTER_CTL_SRCH_FUDGE_FULL);
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EFX_SET_OWORD_FIELD(
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filter_ctl, FRF_CZ_ETHERNET_WILDCARD_SEARCH_LIMIT,
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state->search_depth[EFX_FILTER_RX_MAC_WILD] +
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FILTER_CTL_SRCH_FUDGE_WILD);
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}
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efx_writeo(efx, &filter_ctl, FR_BZ_RX_FILTER_CTL);
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}
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/* Build a filter entry and return its n-tuple key. */
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static u32 efx_filter_build(efx_oword_t *filter, struct efx_filter_spec *spec)
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{
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u32 data3;
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switch (efx_filter_type_table_id(spec->type)) {
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case EFX_FILTER_TABLE_RX_IP: {
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bool is_udp = (spec->type == EFX_FILTER_RX_UDP_FULL ||
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spec->type == EFX_FILTER_RX_UDP_WILD);
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EFX_POPULATE_OWORD_7(
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*filter,
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FRF_BZ_RSS_EN,
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!!(spec->flags & EFX_FILTER_FLAG_RX_RSS),
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FRF_BZ_SCATTER_EN,
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!!(spec->flags & EFX_FILTER_FLAG_RX_SCATTER),
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FRF_BZ_TCP_UDP, is_udp,
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FRF_BZ_RXQ_ID, spec->dmaq_id,
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EFX_DWORD_2, spec->data[2],
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EFX_DWORD_1, spec->data[1],
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EFX_DWORD_0, spec->data[0]);
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data3 = is_udp;
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break;
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}
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case EFX_FILTER_TABLE_RX_MAC: {
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bool is_wild = spec->type == EFX_FILTER_RX_MAC_WILD;
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EFX_POPULATE_OWORD_8(
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*filter,
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FRF_CZ_RMFT_RSS_EN,
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!!(spec->flags & EFX_FILTER_FLAG_RX_RSS),
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FRF_CZ_RMFT_SCATTER_EN,
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!!(spec->flags & EFX_FILTER_FLAG_RX_SCATTER),
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FRF_CZ_RMFT_IP_OVERRIDE,
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!!(spec->flags & EFX_FILTER_FLAG_RX_OVERRIDE_IP),
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FRF_CZ_RMFT_RXQ_ID, spec->dmaq_id,
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FRF_CZ_RMFT_WILDCARD_MATCH, is_wild,
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FRF_CZ_RMFT_DEST_MAC_HI, spec->data[2],
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FRF_CZ_RMFT_DEST_MAC_LO, spec->data[1],
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FRF_CZ_RMFT_VLAN_ID, spec->data[0]);
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data3 = is_wild;
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break;
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}
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default:
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BUG();
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}
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return spec->data[0] ^ spec->data[1] ^ spec->data[2] ^ data3;
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}
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static bool efx_filter_equal(const struct efx_filter_spec *left,
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const struct efx_filter_spec *right)
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{
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if (left->type != right->type ||
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memcmp(left->data, right->data, sizeof(left->data)))
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return false;
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return true;
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}
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static int efx_filter_search(struct efx_filter_table *table,
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struct efx_filter_spec *spec, u32 key,
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bool for_insert, int *depth_required)
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{
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unsigned hash, incr, filter_idx, depth;
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struct efx_filter_spec *cmp;
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hash = efx_filter_hash(key);
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incr = efx_filter_increment(key);
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for (depth = 1, filter_idx = hash & (table->size - 1);
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test_bit(filter_idx, table->used_bitmap);
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++depth) {
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cmp = &table->spec[filter_idx];
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if (efx_filter_equal(spec, cmp))
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goto found;
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filter_idx = (filter_idx + incr) & (table->size - 1);
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}
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if (!for_insert)
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return -ENOENT;
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found:
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*depth_required = depth;
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return filter_idx;
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}
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/**
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* efx_filter_insert_filter - add or replace a filter
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* @efx: NIC in which to insert the filter
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* @spec: Specification for the filter
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* @replace: Flag for whether the specified filter may replace a filter
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* with an identical match expression and equal or lower priority
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*
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* On success, return the filter index within its table.
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* On failure, return a negative error code.
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*/
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int efx_filter_insert_filter(struct efx_nic *efx, struct efx_filter_spec *spec,
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bool replace)
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{
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struct efx_filter_state *state = efx->filter_state;
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enum efx_filter_table_id table_id =
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efx_filter_type_table_id(spec->type);
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struct efx_filter_table *table = &state->table[table_id];
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struct efx_filter_spec *saved_spec;
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efx_oword_t filter;
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int filter_idx, depth;
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u32 key;
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int rc;
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if (table->size == 0)
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return -EINVAL;
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key = efx_filter_build(&filter, spec);
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netif_vdbg(efx, hw, efx->net_dev,
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"%s: type %d search_depth=%d", __func__, spec->type,
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state->search_depth[spec->type]);
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spin_lock_bh(&state->lock);
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rc = efx_filter_search(table, spec, key, true, &depth);
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if (rc < 0)
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goto out;
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filter_idx = rc;
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BUG_ON(filter_idx >= table->size);
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saved_spec = &table->spec[filter_idx];
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if (test_bit(filter_idx, table->used_bitmap)) {
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/* Should we replace the existing filter? */
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if (!replace) {
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rc = -EEXIST;
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goto out;
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}
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if (spec->priority < saved_spec->priority) {
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rc = -EPERM;
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goto out;
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}
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} else {
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__set_bit(filter_idx, table->used_bitmap);
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++table->used;
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}
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*saved_spec = *spec;
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if (state->search_depth[spec->type] < depth) {
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state->search_depth[spec->type] = depth;
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efx_filter_push_rx_limits(efx);
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}
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efx_writeo(efx, &filter, table->offset + table->step * filter_idx);
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netif_vdbg(efx, hw, efx->net_dev,
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"%s: filter type %d index %d rxq %u set",
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__func__, spec->type, filter_idx, spec->dmaq_id);
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out:
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spin_unlock_bh(&state->lock);
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return rc;
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}
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static void efx_filter_table_clear_entry(struct efx_nic *efx,
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struct efx_filter_table *table,
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int filter_idx)
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{
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static efx_oword_t filter;
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if (test_bit(filter_idx, table->used_bitmap)) {
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__clear_bit(filter_idx, table->used_bitmap);
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--table->used;
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memset(&table->spec[filter_idx], 0, sizeof(table->spec[0]));
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efx_writeo(efx, &filter,
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table->offset + table->step * filter_idx);
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}
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}
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/**
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* efx_filter_remove_filter - remove a filter by specification
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* @efx: NIC from which to remove the filter
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* @spec: Specification for the filter
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*
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* On success, return zero.
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* On failure, return a negative error code.
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*/
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int efx_filter_remove_filter(struct efx_nic *efx, struct efx_filter_spec *spec)
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{
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struct efx_filter_state *state = efx->filter_state;
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enum efx_filter_table_id table_id =
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efx_filter_type_table_id(spec->type);
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struct efx_filter_table *table = &state->table[table_id];
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struct efx_filter_spec *saved_spec;
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efx_oword_t filter;
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int filter_idx, depth;
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u32 key;
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int rc;
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key = efx_filter_build(&filter, spec);
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spin_lock_bh(&state->lock);
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rc = efx_filter_search(table, spec, key, false, &depth);
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if (rc < 0)
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goto out;
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filter_idx = rc;
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saved_spec = &table->spec[filter_idx];
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if (spec->priority < saved_spec->priority) {
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rc = -EPERM;
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goto out;
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}
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efx_filter_table_clear_entry(efx, table, filter_idx);
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if (table->used == 0)
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efx_filter_table_reset_search_depth(state, table_id);
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rc = 0;
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out:
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spin_unlock_bh(&state->lock);
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return rc;
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}
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/**
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* efx_filter_table_clear - remove filters from a table by priority
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* @efx: NIC from which to remove the filters
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* @table_id: Table from which to remove the filters
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* @priority: Maximum priority to remove
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*/
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void efx_filter_table_clear(struct efx_nic *efx,
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enum efx_filter_table_id table_id,
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enum efx_filter_priority priority)
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{
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struct efx_filter_state *state = efx->filter_state;
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struct efx_filter_table *table = &state->table[table_id];
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int filter_idx;
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spin_lock_bh(&state->lock);
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for (filter_idx = 0; filter_idx < table->size; ++filter_idx)
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if (table->spec[filter_idx].priority <= priority)
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efx_filter_table_clear_entry(efx, table, filter_idx);
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if (table->used == 0)
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efx_filter_table_reset_search_depth(state, table_id);
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spin_unlock_bh(&state->lock);
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}
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||||
/* Restore filter stater after reset */
|
||||
void efx_restore_filters(struct efx_nic *efx)
|
||||
{
|
||||
struct efx_filter_state *state = efx->filter_state;
|
||||
enum efx_filter_table_id table_id;
|
||||
struct efx_filter_table *table;
|
||||
efx_oword_t filter;
|
||||
int filter_idx;
|
||||
|
||||
spin_lock_bh(&state->lock);
|
||||
|
||||
for (table_id = 0; table_id < EFX_FILTER_TABLE_COUNT; table_id++) {
|
||||
table = &state->table[table_id];
|
||||
for (filter_idx = 0; filter_idx < table->size; filter_idx++) {
|
||||
if (!test_bit(filter_idx, table->used_bitmap))
|
||||
continue;
|
||||
efx_filter_build(&filter, &table->spec[filter_idx]);
|
||||
efx_writeo(efx, &filter,
|
||||
table->offset + table->step * filter_idx);
|
||||
}
|
||||
}
|
||||
|
||||
efx_filter_push_rx_limits(efx);
|
||||
|
||||
spin_unlock_bh(&state->lock);
|
||||
}
|
||||
|
||||
int efx_probe_filters(struct efx_nic *efx)
|
||||
{
|
||||
struct efx_filter_state *state;
|
||||
struct efx_filter_table *table;
|
||||
unsigned table_id;
|
||||
|
||||
state = kzalloc(sizeof(*efx->filter_state), GFP_KERNEL);
|
||||
if (!state)
|
||||
return -ENOMEM;
|
||||
efx->filter_state = state;
|
||||
|
||||
spin_lock_init(&state->lock);
|
||||
|
||||
if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
|
||||
table = &state->table[EFX_FILTER_TABLE_RX_IP];
|
||||
table->offset = FR_BZ_RX_FILTER_TBL0;
|
||||
table->size = FR_BZ_RX_FILTER_TBL0_ROWS;
|
||||
table->step = FR_BZ_RX_FILTER_TBL0_STEP;
|
||||
}
|
||||
|
||||
if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
|
||||
table = &state->table[EFX_FILTER_TABLE_RX_MAC];
|
||||
table->offset = FR_CZ_RX_MAC_FILTER_TBL0;
|
||||
table->size = FR_CZ_RX_MAC_FILTER_TBL0_ROWS;
|
||||
table->step = FR_CZ_RX_MAC_FILTER_TBL0_STEP;
|
||||
}
|
||||
|
||||
for (table_id = 0; table_id < EFX_FILTER_TABLE_COUNT; table_id++) {
|
||||
table = &state->table[table_id];
|
||||
if (table->size == 0)
|
||||
continue;
|
||||
table->used_bitmap = kcalloc(BITS_TO_LONGS(table->size),
|
||||
sizeof(unsigned long),
|
||||
GFP_KERNEL);
|
||||
if (!table->used_bitmap)
|
||||
goto fail;
|
||||
table->spec = vmalloc(table->size * sizeof(*table->spec));
|
||||
if (!table->spec)
|
||||
goto fail;
|
||||
memset(table->spec, 0, table->size * sizeof(*table->spec));
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
efx_remove_filters(efx);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
void efx_remove_filters(struct efx_nic *efx)
|
||||
{
|
||||
struct efx_filter_state *state = efx->filter_state;
|
||||
enum efx_filter_table_id table_id;
|
||||
|
||||
for (table_id = 0; table_id < EFX_FILTER_TABLE_COUNT; table_id++) {
|
||||
kfree(state->table[table_id].used_bitmap);
|
||||
vfree(state->table[table_id].spec);
|
||||
}
|
||||
kfree(state);
|
||||
}
|
189
drivers/net/sfc/filter.h
Normal file
189
drivers/net/sfc/filter.h
Normal file
|
@ -0,0 +1,189 @@
|
|||
/****************************************************************************
|
||||
* Driver for Solarflare Solarstorm network controllers and boards
|
||||
* Copyright 2005-2010 Solarflare Communications Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation, incorporated herein by reference.
|
||||
*/
|
||||
|
||||
#ifndef EFX_FILTER_H
|
||||
#define EFX_FILTER_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
enum efx_filter_table_id {
|
||||
EFX_FILTER_TABLE_RX_IP = 0,
|
||||
EFX_FILTER_TABLE_RX_MAC,
|
||||
EFX_FILTER_TABLE_COUNT,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum efx_filter_type - type of hardware filter
|
||||
* @EFX_FILTER_RX_TCP_FULL: RX, matching TCP/IPv4 4-tuple
|
||||
* @EFX_FILTER_RX_TCP_WILD: RX, matching TCP/IPv4 destination (host, port)
|
||||
* @EFX_FILTER_RX_UDP_FULL: RX, matching UDP/IPv4 4-tuple
|
||||
* @EFX_FILTER_RX_UDP_WILD: RX, matching UDP/IPv4 destination (host, port)
|
||||
* @EFX_FILTER_RX_MAC_FULL: RX, matching Ethernet destination MAC address, VID
|
||||
* @EFX_FILTER_RX_MAC_WILD: RX, matching Ethernet destination MAC address
|
||||
*
|
||||
* Falcon NICs only support the RX TCP/IPv4 and UDP/IPv4 filter types.
|
||||
*/
|
||||
enum efx_filter_type {
|
||||
EFX_FILTER_RX_TCP_FULL = 0,
|
||||
EFX_FILTER_RX_TCP_WILD,
|
||||
EFX_FILTER_RX_UDP_FULL,
|
||||
EFX_FILTER_RX_UDP_WILD,
|
||||
EFX_FILTER_RX_MAC_FULL = 4,
|
||||
EFX_FILTER_RX_MAC_WILD,
|
||||
EFX_FILTER_TYPE_COUNT,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum efx_filter_priority - priority of a hardware filter specification
|
||||
* @EFX_FILTER_PRI_HINT: Performance hint
|
||||
* @EFX_FILTER_PRI_MANUAL: Manually configured filter
|
||||
* @EFX_FILTER_PRI_REQUIRED: Required for correct behaviour
|
||||
*/
|
||||
enum efx_filter_priority {
|
||||
EFX_FILTER_PRI_HINT = 0,
|
||||
EFX_FILTER_PRI_MANUAL,
|
||||
EFX_FILTER_PRI_REQUIRED,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum efx_filter_flags - flags for hardware filter specifications
|
||||
* @EFX_FILTER_FLAG_RX_RSS: Use RSS to spread across multiple queues.
|
||||
* By default, matching packets will be delivered only to the
|
||||
* specified queue. If this flag is set, they will be delivered
|
||||
* to a range of queues offset from the specified queue number
|
||||
* according to the indirection table.
|
||||
* @EFX_FILTER_FLAG_RX_SCATTER: Enable DMA scatter on the receiving
|
||||
* queue.
|
||||
* @EFX_FILTER_FLAG_RX_OVERRIDE_IP: Enables a MAC filter to override
|
||||
* any IP filter that matches the same packet. By default, IP
|
||||
* filters take precedence.
|
||||
*
|
||||
* Currently, no flags are defined for TX filters.
|
||||
*/
|
||||
enum efx_filter_flags {
|
||||
EFX_FILTER_FLAG_RX_RSS = 0x01,
|
||||
EFX_FILTER_FLAG_RX_SCATTER = 0x02,
|
||||
EFX_FILTER_FLAG_RX_OVERRIDE_IP = 0x04,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct efx_filter_spec - specification for a hardware filter
|
||||
* @type: Type of match to be performed, from &enum efx_filter_type
|
||||
* @priority: Priority of the filter, from &enum efx_filter_priority
|
||||
* @flags: Miscellaneous flags, from &enum efx_filter_flags
|
||||
* @dmaq_id: Source/target queue index
|
||||
* @data: Match data (type-dependent)
|
||||
*
|
||||
* Use the efx_filter_set_*() functions to initialise the @type and
|
||||
* @data fields.
|
||||
*/
|
||||
struct efx_filter_spec {
|
||||
u8 type:4;
|
||||
u8 priority:4;
|
||||
u8 flags;
|
||||
u16 dmaq_id;
|
||||
u32 data[3];
|
||||
};
|
||||
|
||||
/**
|
||||
* efx_filter_set_rx_tcp_full - specify RX filter with TCP/IPv4 full match
|
||||
* @spec: Specification to initialise
|
||||
* @shost: Source host address (host byte order)
|
||||
* @sport: Source port (host byte order)
|
||||
* @dhost: Destination host address (host byte order)
|
||||
* @dport: Destination port (host byte order)
|
||||
*/
|
||||
static inline void
|
||||
efx_filter_set_rx_tcp_full(struct efx_filter_spec *spec,
|
||||
u32 shost, u16 sport, u32 dhost, u16 dport)
|
||||
{
|
||||
spec->type = EFX_FILTER_RX_TCP_FULL;
|
||||
spec->data[0] = sport | shost << 16;
|
||||
spec->data[1] = dport << 16 | shost >> 16;
|
||||
spec->data[2] = dhost;
|
||||
}
|
||||
|
||||
/**
|
||||
* efx_filter_set_rx_tcp_wild - specify RX filter with TCP/IPv4 wildcard match
|
||||
* @spec: Specification to initialise
|
||||
* @dhost: Destination host address (host byte order)
|
||||
* @dport: Destination port (host byte order)
|
||||
*/
|
||||
static inline void
|
||||
efx_filter_set_rx_tcp_wild(struct efx_filter_spec *spec, u32 dhost, u16 dport)
|
||||
{
|
||||
spec->type = EFX_FILTER_RX_TCP_WILD;
|
||||
spec->data[0] = 0;
|
||||
spec->data[1] = dport << 16;
|
||||
spec->data[2] = dhost;
|
||||
}
|
||||
|
||||
/**
|
||||
* efx_filter_set_rx_udp_full - specify RX filter with UDP/IPv4 full match
|
||||
* @spec: Specification to initialise
|
||||
* @shost: Source host address (host byte order)
|
||||
* @sport: Source port (host byte order)
|
||||
* @dhost: Destination host address (host byte order)
|
||||
* @dport: Destination port (host byte order)
|
||||
*/
|
||||
static inline void
|
||||
efx_filter_set_rx_udp_full(struct efx_filter_spec *spec,
|
||||
u32 shost, u16 sport, u32 dhost, u16 dport)
|
||||
{
|
||||
spec->type = EFX_FILTER_RX_UDP_FULL;
|
||||
spec->data[0] = sport | shost << 16;
|
||||
spec->data[1] = dport << 16 | shost >> 16;
|
||||
spec->data[2] = dhost;
|
||||
}
|
||||
|
||||
/**
|
||||
* efx_filter_set_rx_udp_wild - specify RX filter with UDP/IPv4 wildcard match
|
||||
* @spec: Specification to initialise
|
||||
* @dhost: Destination host address (host byte order)
|
||||
* @dport: Destination port (host byte order)
|
||||
*/
|
||||
static inline void
|
||||
efx_filter_set_rx_udp_wild(struct efx_filter_spec *spec, u32 dhost, u16 dport)
|
||||
{
|
||||
spec->type = EFX_FILTER_RX_UDP_WILD;
|
||||
spec->data[0] = dport;
|
||||
spec->data[1] = 0;
|
||||
spec->data[2] = dhost;
|
||||
}
|
||||
|
||||
/**
|
||||
* efx_filter_set_rx_mac_full - specify RX filter with MAC full match
|
||||
* @spec: Specification to initialise
|
||||
* @vid: VLAN ID
|
||||
* @addr: Destination MAC address
|
||||
*/
|
||||
static inline void efx_filter_set_rx_mac_full(struct efx_filter_spec *spec,
|
||||
u16 vid, const u8 *addr)
|
||||
{
|
||||
spec->type = EFX_FILTER_RX_MAC_FULL;
|
||||
spec->data[0] = vid;
|
||||
spec->data[1] = addr[2] << 24 | addr[3] << 16 | addr[4] << 8 | addr[5];
|
||||
spec->data[2] = addr[0] << 8 | addr[1];
|
||||
}
|
||||
|
||||
/**
|
||||
* efx_filter_set_rx_mac_full - specify RX filter with MAC wildcard match
|
||||
* @spec: Specification to initialise
|
||||
* @addr: Destination MAC address
|
||||
*/
|
||||
static inline void efx_filter_set_rx_mac_wild(struct efx_filter_spec *spec,
|
||||
const u8 *addr)
|
||||
{
|
||||
spec->type = EFX_FILTER_RX_MAC_WILD;
|
||||
spec->data[0] = 0;
|
||||
spec->data[1] = addr[2] << 24 | addr[3] << 16 | addr[4] << 8 | addr[5];
|
||||
spec->data[2] = addr[0] << 8 | addr[1];
|
||||
}
|
||||
|
||||
#endif /* EFX_FILTER_H */
|
|
@ -619,6 +619,8 @@ union efx_multicast_hash {
|
|||
efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
|
||||
};
|
||||
|
||||
struct efx_filter_state;
|
||||
|
||||
/**
|
||||
* struct efx_nic - an Efx NIC
|
||||
* @name: Device name (net device name or bus id before net device registered)
|
||||
|
@ -799,6 +801,8 @@ struct efx_nic {
|
|||
u64 loopback_modes;
|
||||
|
||||
void *loopback_selftest;
|
||||
|
||||
struct efx_filter_state *filter_state;
|
||||
};
|
||||
|
||||
static inline int efx_dev_registered(struct efx_nic *efx)
|
||||
|
|
|
@ -2893,6 +2893,20 @@
|
|||
#define FRF_AB_XX_FORCE_SIG_WIDTH 8
|
||||
#define FFE_AB_XX_FORCE_SIG_ALL_LANES 0xff
|
||||
|
||||
/* RX_MAC_FILTER_TBL0 */
|
||||
/* RMFT_DEST_MAC is wider than 32 bits */
|
||||
#define FRF_CZ_RMFT_DEST_MAC_LO_LBN 12
|
||||
#define FRF_CZ_RMFT_DEST_MAC_LO_WIDTH 32
|
||||
#define FRF_CZ_RMFT_DEST_MAC_HI_LBN 44
|
||||
#define FRF_CZ_RMFT_DEST_MAC_HI_WIDTH 16
|
||||
|
||||
/* TX_MAC_FILTER_TBL0 */
|
||||
/* TMFT_SRC_MAC is wider than 32 bits */
|
||||
#define FRF_CZ_TMFT_SRC_MAC_LO_LBN 12
|
||||
#define FRF_CZ_TMFT_SRC_MAC_LO_WIDTH 32
|
||||
#define FRF_CZ_TMFT_SRC_MAC_HI_LBN 44
|
||||
#define FRF_CZ_TMFT_SRC_MAC_HI_WIDTH 16
|
||||
|
||||
/* DRIVER_EV */
|
||||
/* Sub-fields of an RX flush completion event */
|
||||
#define FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL_LBN 12
|
||||
|
|
Loading…
Reference in a new issue