cpufreq for freescale mx51
Currently, only two operating points: 160Mhz and 800Mhz. the operating points are tested on babbage 3.0 Signed-off-by: Yong Shen <yong.shen@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Yong Shen
Sascha Hauer
parent
71e2889d9d
commit
64f102b67f
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@ -1584,6 +1584,12 @@ if ARCH_HAS_CPUFREQ
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source "drivers/cpufreq/Kconfig"
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config CPU_FREQ_IMX
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tristate "CPUfreq driver for i.MX CPUs"
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depends on ARCH_MXC && CPU_FREQ
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help
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This enables the CPUfreq driver for i.MX CPUs.
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config CPU_FREQ_SA1100
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bool
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@ -6,6 +6,7 @@ config ARCH_MX51
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select MXC_TZIC
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select ARCH_MXC_IOMUX_V3
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select ARCH_MXC_AUDMUX_V2
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select ARCH_HAS_CPUFREQ
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comment "MX5 platforms:"
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@ -5,6 +5,7 @@
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# Object file lists.
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obj-y := cpu.o mm.o clock-mx51.o devices.o
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obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
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obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
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obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
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obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
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@ -1,5 +1,5 @@
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/*
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* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
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*
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* The code contained herein is licensed under the GNU General Public
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@ -32,6 +32,7 @@
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#include "devices-imx51.h"
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#include "devices.h"
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#include "cpu_op-mx51.h"
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#define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
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#define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
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@ -298,6 +299,9 @@ static void __init mxc_board_init(void)
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{
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struct pad_desc usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
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#if defined(CONFIG_CPU_FREQ_IMX)
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get_cpu_op = mx51_get_cpu_op;
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#endif
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mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
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ARRAY_SIZE(mx51babbage_pads));
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mxc_init_imx_uart();
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@ -362,7 +362,7 @@ static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent)
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return 0;
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}
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static unsigned long clk_arm_get_rate(struct clk *clk)
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static unsigned long clk_cpu_get_rate(struct clk *clk)
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{
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u32 cacrr, div;
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unsigned long parent_rate;
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@ -374,6 +374,22 @@ static unsigned long clk_arm_get_rate(struct clk *clk)
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return parent_rate / div;
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}
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static int clk_cpu_set_rate(struct clk *clk, unsigned long rate)
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{
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u32 reg, cpu_podf;
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unsigned long parent_rate;
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parent_rate = clk_get_rate(clk->parent);
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cpu_podf = parent_rate / rate - 1;
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/* use post divider to change freq */
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reg = __raw_readl(MXC_CCM_CACRR);
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reg &= ~MXC_CCM_CACRR_ARM_PODF_MASK;
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reg |= cpu_podf << MXC_CCM_CACRR_ARM_PODF_OFFSET;
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__raw_writel(reg, MXC_CCM_CACRR);
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return 0;
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}
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static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent)
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{
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u32 reg, mux;
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@ -736,7 +752,8 @@ static struct clk periph_apm_clk = {
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static struct clk cpu_clk = {
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.parent = &pll1_sw_clk,
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.get_rate = clk_arm_get_rate,
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.get_rate = clk_cpu_get_rate,
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.set_rate = clk_cpu_set_rate,
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};
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static struct clk ahb_clk = {
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@ -1064,6 +1081,7 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk)
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_REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
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_REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
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_REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk)
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};
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static void clk_tree_init(void)
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@ -0,0 +1,29 @@
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/*
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* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/types.h>
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#include <mach/hardware.h>
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#include <linux/kernel.h>
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static struct cpu_op mx51_cpu_op[] = {
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{
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.cpu_rate = 160000000,},
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{
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.cpu_rate = 800000000,},
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};
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struct cpu_op *mx51_get_cpu_op(int *op)
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{
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*op = ARRAY_SIZE(mx51_cpu_op);
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return mx51_cpu_op;
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}
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@ -0,0 +1,14 @@
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/*
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* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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extern struct cpu_op *mx51_get_cpu_op(int *op);
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@ -18,6 +18,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
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obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o
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obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o
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obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
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obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
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ifdef CONFIG_SND_IMX_SOC
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obj-y += ssi-fiq.o
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obj-y += ssi-fiq-ksym.o
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@ -0,0 +1,206 @@
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/*
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* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/*
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* A driver for the Freescale Semiconductor i.MXC CPUfreq module.
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* The CPUFREQ driver is for controling CPU frequency. It allows you to change
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* the CPU clock speed on the fly.
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*/
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <mach/hardware.h>
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#include <mach/clock.h>
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#define CLK32_FREQ 32768
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#define NANOSECOND (1000 * 1000 * 1000)
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struct cpu_op *(*get_cpu_op)(int *op);
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static int cpu_freq_khz_min;
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static int cpu_freq_khz_max;
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static struct clk *cpu_clk;
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static struct cpufreq_frequency_table *imx_freq_table;
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static int cpu_op_nr;
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static struct cpu_op *cpu_op_tbl;
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static int set_cpu_freq(int freq)
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{
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int ret = 0;
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int org_cpu_rate;
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org_cpu_rate = clk_get_rate(cpu_clk);
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if (org_cpu_rate == freq)
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return ret;
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ret = clk_set_rate(cpu_clk, freq);
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if (ret != 0) {
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printk(KERN_DEBUG "cannot set CPU clock rate\n");
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return ret;
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}
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return ret;
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}
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static int mxc_verify_speed(struct cpufreq_policy *policy)
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{
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if (policy->cpu != 0)
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return -EINVAL;
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return cpufreq_frequency_table_verify(policy, imx_freq_table);
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}
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static unsigned int mxc_get_speed(unsigned int cpu)
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{
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if (cpu)
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return 0;
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return clk_get_rate(cpu_clk) / 1000;
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}
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static int mxc_set_target(struct cpufreq_policy *policy,
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unsigned int target_freq, unsigned int relation)
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{
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struct cpufreq_freqs freqs;
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int freq_Hz;
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int ret = 0;
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unsigned int index;
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cpufreq_frequency_table_target(policy, imx_freq_table,
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target_freq, relation, &index);
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freq_Hz = imx_freq_table[index].frequency * 1000;
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freqs.old = clk_get_rate(cpu_clk) / 1000;
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freqs.new = freq_Hz / 1000;
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freqs.cpu = 0;
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freqs.flags = 0;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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ret = set_cpu_freq(freq_Hz);
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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return ret;
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}
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static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
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{
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int ret;
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int i;
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printk(KERN_INFO "i.MXC CPU frequency driver\n");
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if (policy->cpu != 0)
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return -EINVAL;
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if (!get_cpu_op)
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return -EINVAL;
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cpu_clk = clk_get(NULL, "cpu_clk");
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if (IS_ERR(cpu_clk)) {
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printk(KERN_ERR "%s: failed to get cpu clock\n", __func__);
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return PTR_ERR(cpu_clk);
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}
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cpu_op_tbl = get_cpu_op(&cpu_op_nr);
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cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
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cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
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imx_freq_table = kmalloc(
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sizeof(struct cpufreq_frequency_table) * (cpu_op_nr + 1),
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GFP_KERNEL);
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if (!imx_freq_table) {
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ret = -ENOMEM;
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goto err1;
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}
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for (i = 0; i < cpu_op_nr; i++) {
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imx_freq_table[i].index = i;
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imx_freq_table[i].frequency = cpu_op_tbl[i].cpu_rate / 1000;
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if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
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cpu_freq_khz_min = cpu_op_tbl[i].cpu_rate / 1000;
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if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
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cpu_freq_khz_max = cpu_op_tbl[i].cpu_rate / 1000;
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}
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imx_freq_table[i].index = i;
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imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
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policy->cur = clk_get_rate(cpu_clk) / 1000;
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
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policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
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/* Manual states, that PLL stabilizes in two CLK32 periods */
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policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
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ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table);
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if (ret < 0) {
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printk(KERN_ERR "%s: failed to register i.MXC CPUfreq \
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with error code %d\n", __func__, ret);
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goto err;
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}
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cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu);
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return 0;
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err:
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kfree(imx_freq_table);
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err1:
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clk_put(cpu_clk);
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return ret;
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}
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static int mxc_cpufreq_exit(struct cpufreq_policy *policy)
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{
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cpufreq_frequency_table_put_attr(policy->cpu);
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set_cpu_freq(cpu_freq_khz_max * 1000);
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clk_put(cpu_clk);
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kfree(imx_freq_table);
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return 0;
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}
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static struct cpufreq_driver mxc_driver = {
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.flags = CPUFREQ_STICKY,
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.verify = mxc_verify_speed,
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.target = mxc_set_target,
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.get = mxc_get_speed,
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.init = mxc_cpufreq_init,
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.exit = mxc_cpufreq_exit,
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.name = "imx",
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};
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static int __devinit mxc_cpufreq_driver_init(void)
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{
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return cpufreq_register_driver(&mxc_driver);
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}
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static void mxc_cpufreq_driver_exit(void)
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{
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cpufreq_unregister_driver(&mxc_driver);
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}
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module_init(mxc_cpufreq_driver_init);
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module_exit(mxc_cpufreq_driver_exit);
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MODULE_AUTHOR("Freescale Semiconductor Inc. Yong Shen <yong.shen@linaro.org>");
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MODULE_DESCRIPTION("CPUfreq driver for i.MX");
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MODULE_LICENSE("GPL");
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@ -1,5 +1,5 @@
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/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*
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* This program is free software; you can redistribute it and/or
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@ -20,6 +20,8 @@
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#ifndef __ASM_ARCH_MXC_H__
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#define __ASM_ARCH_MXC_H__
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#include <linux/types.h>
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#error "Do not include directly."
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#endif
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@ -133,6 +135,15 @@ extern unsigned int __mxc_cpu_type;
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# define cpu_is_mxc91231() (0)
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#endif
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#ifndef __ASSEMBLY__
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struct cpu_op {
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u32 cpu_rate;
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};
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extern struct cpu_op *(*get_cpu_op)(int *op);
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#endif
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#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
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/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
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#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))
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