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drm/amd/include:cleanup vega10 mmhub header files.

Browse source 
Cleanup asic_reg/vega10/MMHUB folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Feifei Xu 2017-11-23 14:30:43 +08:00 committed by Alex Deucher
parent cde5c34f63
commit 65417d9f55
8 changed files with 10 additions and 10 deletions
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2
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
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@ -32,7 +32,7 @@
#include "dce/dce_12_0_offset.h"
#include "dce/dce_12_0_sh_mask.h"
#include "vega10/vega10_enum.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h"
#include "mmhub/mmhub_1_0_offset.h"
#include "athub/athub_1_0_offset.h"
#include "soc15_common.h"

6
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
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@ -24,9 +24,9 @@
#include "mmhub_v1_0.h"
#include "vega10/soc15ip.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
#include "vega10/MMHUB/mmhub_1_0_default.h"
#include "mmhub/mmhub_1_0_offset.h"
#include "mmhub/mmhub_1_0_sh_mask.h"
#include "mmhub/mmhub_1_0_default.h"
#include "athub/athub_1_0_offset.h"
#include "athub/athub_1_0_sh_mask.h"
#include "vega10/vega10_enum.h"

4
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
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@ -32,8 +32,8 @@
#include "sdma0/sdma0_4_0_sh_mask.h"
#include "sdma1/sdma1_4_0_offset.h"
#include "sdma1/sdma1_4_0_sh_mask.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
#include "mmhub/mmhub_1_0_offset.h"
#include "mmhub/mmhub_1_0_sh_mask.h"
#include "hdp/hdp_4_0_offset.h"
#include "raven1/SDMA0/sdma0_4_1_default.h"

4
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
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@ -37,8 +37,8 @@
#include "vce/vce_4_0_sh_mask.h"
#include "vega10/NBIF/nbif_6_1_offset.h"
#include "hdp/hdp_4_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
#include "mmhub/mmhub_1_0_offset.h"
#include "mmhub/mmhub_1_0_sh_mask.h"
static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev);
static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev);

4
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
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@ -36,8 +36,8 @@
#include "vce/vce_4_0_offset.h"
#include "vce/vce_4_0_default.h"
#include "vce/vce_4_0_sh_mask.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
#include "mmhub/mmhub_1_0_offset.h"
#include "mmhub/mmhub_1_0_sh_mask.h"
#define VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK 0x02

0
drivers/gpu/drm/amd/include/asic_reg/vega10/MMHUB/mmhub_1_0_default.h → drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_default.h
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0
drivers/gpu/drm/amd/include/asic_reg/vega10/MMHUB/mmhub_1_0_offset.h → drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h
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0
drivers/gpu/drm/amd/include/asic_reg/vega10/MMHUB/mmhub_1_0_sh_mask.h → drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h
View file