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Merge branch 'pci/virtualization'
- Remove redundant variable init in xen (Colin Ian King) - Add pci_pri_supported() to check device or associated PF for PRI support (Ashok Raj) - Mark AMD Navi10 GPU rev 0x00 ATS as broken (Kai-Heng Feng) - Release IVRS table in AMD ACS quirk (Hanjun Guo) * pci/virtualization: PCI: Release IVRS table in AMD ACS quirk PCI: Mark AMD Navi10 GPU rev 0x00 ATS as broken PCI/ATS: Add pci_pri_supported() to check device or associated PF xen: Remove redundant initialization of irq
This commit is contained in:
commit
6585a1a14e
5 changed files with 27 additions and 3 deletions
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@ -62,7 +62,7 @@ static int xen_pcifront_enable_irq(struct pci_dev *dev)
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#ifdef CONFIG_ACPI
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static int xen_register_pirq(u32 gsi, int triggering, bool set_pirq)
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{
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int rc, pirq = -1, irq = -1;
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int rc, pirq = -1, irq;
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struct physdev_map_pirq map_irq;
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int shareable = 0;
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char *name;
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@ -2554,7 +2554,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
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}
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if (info->ats_supported && ecap_prs(iommu->ecap) &&
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pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI))
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pci_pri_supported(pdev))
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info->pri_supported = 1;
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}
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}
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@ -325,6 +325,21 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev)
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return pdev->pasid_required;
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}
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/**
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* pci_pri_supported - Check if PRI is supported.
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* @pdev: PCI device structure
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*
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* Returns true if PRI capability is present, false otherwise.
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*/
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bool pci_pri_supported(struct pci_dev *pdev)
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{
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/* VFs share the PF PRI */
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if (pci_physfn(pdev)->pri_cap)
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return true;
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return false;
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}
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EXPORT_SYMBOL_GPL(pci_pri_supported);
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#endif /* CONFIG_PCI_PRI */
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#ifdef CONFIG_PCI_PASID
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@ -4409,6 +4409,8 @@ static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u16 acs_flags)
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if (ACPI_FAILURE(status))
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return -ENODEV;
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acpi_put_table(header);
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/* Filter out flags not applicable to multifunction */
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acs_flags &= (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_EC | PCI_ACS_DT);
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@ -5192,7 +5194,8 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0422, quirk_no_ext_tags);
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*/
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static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
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{
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if (pdev->device == 0x7340 && pdev->revision != 0xc5)
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if ((pdev->device == 0x7312 && pdev->revision != 0x00) ||
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(pdev->device == 0x7340 && pdev->revision != 0xc5))
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return;
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pci_info(pdev, "disabling ATS\n");
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@ -5203,6 +5206,8 @@ static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats);
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/* AMD Iceland dGPU */
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats);
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/* AMD Navi10 dGPU */
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7312, quirk_amd_harvest_no_ats);
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/* AMD Navi14 dGPU */
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats);
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#endif /* CONFIG_PCI_ATS */
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@ -28,6 +28,10 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
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void pci_disable_pri(struct pci_dev *pdev);
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int pci_reset_pri(struct pci_dev *pdev);
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int pci_prg_resp_pasid_required(struct pci_dev *pdev);
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bool pci_pri_supported(struct pci_dev *pdev);
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#else
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static inline bool pci_pri_supported(struct pci_dev *pdev)
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{ return false; }
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#endif /* CONFIG_PCI_PRI */
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#ifdef CONFIG_PCI_PASID
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