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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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ASoC: SOF: Add PM support for i.MX8/i.MX8X/i.MX8M
Merge series from Daniel Baluta <daniel.baluta@oss.nxp.com>: This patch series adds support for System PM and Runtime PM with SOF for i.MX8 platforms.
This commit is contained in:
Mark Brown
commit
65c16dd294
4 changed files with 362 additions and 1 deletions
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@ -74,4 +74,28 @@ void imx8_dump(struct snd_sof_dev *sdev, u32 flags)
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}
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EXPORT_SYMBOL(imx8_dump);
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int imx8_parse_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks)
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{
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int ret;
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ret = devm_clk_bulk_get(sdev->dev, clks->num_dsp_clks, clks->dsp_clks);
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if (ret)
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dev_err(sdev->dev, "Failed to request DSP clocks\n");
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return ret;
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}
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EXPORT_SYMBOL(imx8_parse_clocks);
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int imx8_enable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks)
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{
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return clk_bulk_prepare_enable(clks->num_dsp_clks, clks->dsp_clks);
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}
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EXPORT_SYMBOL(imx8_enable_clocks);
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void imx8_disable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks)
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{
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clk_bulk_disable_unprepare(clks->num_dsp_clks, clks->dsp_clks);
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}
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EXPORT_SYMBOL(imx8_disable_clocks);
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MODULE_LICENSE("Dual BSD/GPL");
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@ -3,6 +3,8 @@
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#ifndef __IMX_COMMON_H__
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#define __IMX_COMMON_H__
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#include <linux/clk.h>
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#define EXCEPT_MAX_HDR_SIZE 0x400
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#define IMX8_STACK_DUMP_SIZE 32
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@ -13,4 +15,13 @@ void imx8_get_registers(struct snd_sof_dev *sdev,
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void imx8_dump(struct snd_sof_dev *sdev, u32 flags);
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struct imx_clocks {
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struct clk_bulk_data *dsp_clks;
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int num_dsp_clks;
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};
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int imx8_parse_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks);
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int imx8_enable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks);
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void imx8_disable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks);
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#endif
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@ -41,6 +41,13 @@
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#define MBOX_OFFSET 0x800000
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#define MBOX_SIZE 0x1000
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/* DSP clocks */
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static struct clk_bulk_data imx8_dsp_clks[] = {
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{ .id = "ipg" },
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{ .id = "ocram" },
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{ .id = "core" },
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};
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struct imx8_priv {
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struct device *dev;
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struct snd_sof_dev *sdev;
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@ -57,6 +64,7 @@ struct imx8_priv {
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struct device **pd_dev;
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struct device_link **link;
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struct imx_clocks *clks;
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};
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static int imx8_get_mailbox_offset(struct snd_sof_dev *sdev)
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@ -188,6 +196,10 @@ static int imx8_probe(struct snd_sof_dev *sdev)
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if (!priv)
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return -ENOMEM;
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priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
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if (!priv->clks)
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return -ENOMEM;
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sdev->num_cores = 1;
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sdev->pdata->hw_pdata = priv;
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priv->dev = sdev->dev;
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@ -301,6 +313,18 @@ static int imx8_probe(struct snd_sof_dev *sdev)
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/* set default mailbox offset for FW ready message */
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sdev->dsp_box.offset = MBOX_OFFSET;
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/* init clocks info */
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priv->clks->dsp_clks = imx8_dsp_clks;
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priv->clks->num_dsp_clks = ARRAY_SIZE(imx8_dsp_clks);
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ret = imx8_parse_clocks(sdev, priv->clks);
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if (ret < 0)
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goto exit_pdev_unregister;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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goto exit_pdev_unregister;
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return 0;
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exit_pdev_unregister:
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@ -319,6 +343,7 @@ static int imx8_remove(struct snd_sof_dev *sdev)
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struct imx8_priv *priv = sdev->pdata->hw_pdata;
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int i;
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imx8_disable_clocks(sdev, priv->clks);
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platform_device_unregister(priv->ipc_dev);
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for (i = 0; i < priv->num_domains; i++) {
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@ -342,6 +367,92 @@ static int imx8_get_bar_index(struct snd_sof_dev *sdev, u32 type)
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}
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}
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static void imx8_suspend(struct snd_sof_dev *sdev)
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{
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int i;
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struct imx8_priv *priv = (struct imx8_priv *)sdev->pdata->hw_pdata;
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_free_channel(priv->dsp_ipc, i);
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imx8_disable_clocks(sdev, priv->clks);
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}
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static int imx8_resume(struct snd_sof_dev *sdev)
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{
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struct imx8_priv *priv = (struct imx8_priv *)sdev->pdata->hw_pdata;
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int ret;
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int i;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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return ret;
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_request_channel(priv->dsp_ipc, i);
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return 0;
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}
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static int imx8_dsp_runtime_resume(struct snd_sof_dev *sdev)
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{
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int ret;
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const struct sof_dsp_power_state target_dsp_state = {
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.state = SOF_DSP_PM_D0,
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};
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ret = imx8_resume(sdev);
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if (ret < 0)
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return ret;
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return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
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}
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static int imx8_dsp_runtime_suspend(struct snd_sof_dev *sdev)
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{
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const struct sof_dsp_power_state target_dsp_state = {
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.state = SOF_DSP_PM_D3,
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};
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imx8_suspend(sdev);
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return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
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}
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static int imx8_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
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{
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const struct sof_dsp_power_state target_dsp_state = {
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.state = target_state,
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};
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if (!pm_runtime_suspended(sdev->dev))
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imx8_suspend(sdev);
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return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
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}
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static int imx8_dsp_resume(struct snd_sof_dev *sdev)
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{
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int ret;
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const struct sof_dsp_power_state target_dsp_state = {
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.state = SOF_DSP_PM_D0,
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};
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ret = imx8_resume(sdev);
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if (ret < 0)
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return ret;
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if (pm_runtime_suspended(sdev->dev)) {
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pm_runtime_disable(sdev->dev);
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pm_runtime_set_active(sdev->dev);
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pm_runtime_mark_last_busy(sdev->dev);
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pm_runtime_enable(sdev->dev);
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pm_runtime_idle(sdev->dev);
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}
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return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
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}
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static struct snd_soc_dai_driver imx8_dai[] = {
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{
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.name = "esai0",
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@ -367,6 +478,14 @@ static struct snd_soc_dai_driver imx8_dai[] = {
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},
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};
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static int imx8_dsp_set_power_state(struct snd_sof_dev *sdev,
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const struct sof_dsp_power_state *target_state)
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{
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sdev->dsp_power_state = *target_state;
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return 0;
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}
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/* i.MX8 ops */
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struct snd_sof_dsp_ops sof_imx8_ops = {
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/* probe and remove */
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@ -419,6 +538,15 @@ struct snd_sof_dsp_ops sof_imx8_ops = {
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
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/* PM */
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.runtime_suspend = imx8_dsp_runtime_suspend,
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.runtime_resume = imx8_dsp_runtime_resume,
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.suspend = imx8_dsp_suspend,
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.resume = imx8_dsp_resume,
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.set_power_state = imx8_dsp_set_power_state,
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};
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EXPORT_SYMBOL(sof_imx8_ops);
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@ -468,6 +596,15 @@ struct snd_sof_dsp_ops sof_imx8x_ops = {
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.drv = imx8_dai,
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.num_drv = ARRAY_SIZE(imx8_dai),
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/* PM */
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.runtime_suspend = imx8_dsp_runtime_suspend,
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.runtime_resume = imx8_dsp_runtime_resume,
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.suspend = imx8_dsp_suspend,
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.resume = imx8_dsp_resume,
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.set_power_state = imx8_dsp_set_power_state,
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/* ALSA HW info flags */
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.hw_info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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@ -6,10 +6,13 @@
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//
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// Hardware interface for audio DSP on i.MX8M
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#include <linux/bits.h>
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#include <linux/firmware.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/regmap.h>
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#include <linux/module.h>
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#include <sound/sof.h>
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@ -23,6 +26,26 @@
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#define MBOX_OFFSET 0x800000
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#define MBOX_SIZE 0x1000
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static struct clk_bulk_data imx8m_dsp_clks[] = {
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{ .id = "ipg" },
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{ .id = "ocram" },
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{ .id = "core" },
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};
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/* DAP registers */
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#define IMX8M_DAP_DEBUG 0x28800000
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#define IMX8M_DAP_DEBUG_SIZE (64 * 1024)
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#define IMX8M_DAP_PWRCTL (0x4000 + 0x3020)
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#define IMX8M_PWRCTL_CORERESET BIT(16)
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/* DSP audio mix registers */
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#define AudioDSP_REG0 0x100
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#define AudioDSP_REG1 0x104
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#define AudioDSP_REG2 0x108
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#define AudioDSP_REG3 0x10c
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#define AudioDSP_REG2_RUNSTALL BIT(5)
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struct imx8m_priv {
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struct device *dev;
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struct snd_sof_dev *sdev;
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@ -30,6 +53,11 @@ struct imx8m_priv {
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/* DSP IPC handler */
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struct imx_dsp_ipc *dsp_ipc;
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struct platform_device *ipc_dev;
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struct imx_clocks *clks;
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void __iomem *dap;
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struct regmap *regmap;
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};
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static int imx8m_get_mailbox_offset(struct snd_sof_dev *sdev)
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@ -88,7 +116,34 @@ static int imx8m_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
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*/
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static int imx8m_run(struct snd_sof_dev *sdev)
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{
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/* TODO: start DSP using Audio MIX bits */
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struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
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regmap_update_bits(priv->regmap, AudioDSP_REG2, AudioDSP_REG2_RUNSTALL, 0);
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return 0;
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}
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static int imx8m_reset(struct snd_sof_dev *sdev)
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{
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struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
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u32 pwrctl;
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/* put DSP into reset and stall */
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pwrctl = readl(priv->dap + IMX8M_DAP_PWRCTL);
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pwrctl |= IMX8M_PWRCTL_CORERESET;
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writel(pwrctl, priv->dap + IMX8M_DAP_PWRCTL);
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/* keep reset asserted for 10 cycles */
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usleep_range(1, 2);
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regmap_update_bits(priv->regmap, AudioDSP_REG2,
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AudioDSP_REG2_RUNSTALL, AudioDSP_REG2_RUNSTALL);
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/* take the DSP out of reset and keep stalled for FW loading */
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pwrctl = readl(priv->dap + IMX8M_DAP_PWRCTL);
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pwrctl &= ~IMX8M_PWRCTL_CORERESET;
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writel(pwrctl, priv->dap + IMX8M_DAP_PWRCTL);
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return 0;
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}
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@ -108,6 +163,10 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
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if (!priv)
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return -ENOMEM;
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priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
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if (!priv->clks)
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return -ENOMEM;
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sdev->num_cores = 1;
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sdev->pdata->hw_pdata = priv;
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priv->dev = sdev->dev;
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@ -141,6 +200,13 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
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goto exit_pdev_unregister;
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}
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priv->dap = devm_ioremap(sdev->dev, IMX8M_DAP_DEBUG, IMX8M_DAP_DEBUG_SIZE);
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if (!priv->dap) {
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dev_err(sdev->dev, "error: failed to map DAP debug memory area");
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ret = -ENODEV;
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goto exit_pdev_unregister;
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}
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sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size);
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if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) {
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dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n",
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@ -176,6 +242,25 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
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/* set default mailbox offset for FW ready message */
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sdev->dsp_box.offset = MBOX_OFFSET;
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priv->regmap = syscon_regmap_lookup_by_compatible("fsl,dsp-ctrl");
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if (IS_ERR(priv->regmap)) {
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dev_err(sdev->dev, "cannot find dsp-ctrl registers");
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ret = PTR_ERR(priv->regmap);
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goto exit_pdev_unregister;
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}
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/* init clocks info */
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priv->clks->dsp_clks = imx8m_dsp_clks;
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priv->clks->num_dsp_clks = ARRAY_SIZE(imx8m_dsp_clks);
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ret = imx8_parse_clocks(sdev, priv->clks);
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if (ret < 0)
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goto exit_pdev_unregister;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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goto exit_pdev_unregister;
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return 0;
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exit_pdev_unregister:
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@ -187,6 +272,7 @@ static int imx8m_remove(struct snd_sof_dev *sdev)
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{
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struct imx8m_priv *priv = sdev->pdata->hw_pdata;
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imx8_disable_clocks(sdev, priv->clks);
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platform_device_unregister(priv->ipc_dev);
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return 0;
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@ -230,6 +316,100 @@ static struct snd_soc_dai_driver imx8m_dai[] = {
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},
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};
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static int imx8m_dsp_set_power_state(struct snd_sof_dev *sdev,
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const struct sof_dsp_power_state *target_state)
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{
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sdev->dsp_power_state = *target_state;
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return 0;
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}
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static int imx8m_resume(struct snd_sof_dev *sdev)
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{
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struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
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int ret;
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int i;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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return ret;
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_request_channel(priv->dsp_ipc, i);
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return 0;
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}
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|
||||
static void imx8m_suspend(struct snd_sof_dev *sdev)
|
||||
{
|
||||
struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
|
||||
imx_dsp_free_channel(priv->dsp_ipc, i);
|
||||
|
||||
imx8_disable_clocks(sdev, priv->clks);
|
||||
}
|
||||
|
||||
static int imx8m_dsp_runtime_resume(struct snd_sof_dev *sdev)
|
||||
{
|
||||
int ret;
|
||||
const struct sof_dsp_power_state target_dsp_state = {
|
||||
.state = SOF_DSP_PM_D0,
|
||||
};
|
||||
|
||||
ret = imx8m_resume(sdev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
|
||||
}
|
||||
|
||||
static int imx8m_dsp_runtime_suspend(struct snd_sof_dev *sdev)
|
||||
{
|
||||
const struct sof_dsp_power_state target_dsp_state = {
|
||||
.state = SOF_DSP_PM_D3,
|
||||
};
|
||||
|
||||
imx8m_suspend(sdev);
|
||||
|
||||
return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
|
||||
}
|
||||
|
||||
static int imx8m_dsp_resume(struct snd_sof_dev *sdev)
|
||||
{
|
||||
int ret;
|
||||
const struct sof_dsp_power_state target_dsp_state = {
|
||||
.state = SOF_DSP_PM_D0,
|
||||
};
|
||||
|
||||
ret = imx8m_resume(sdev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (pm_runtime_suspended(sdev->dev)) {
|
||||
pm_runtime_disable(sdev->dev);
|
||||
pm_runtime_set_active(sdev->dev);
|
||||
pm_runtime_mark_last_busy(sdev->dev);
|
||||
pm_runtime_enable(sdev->dev);
|
||||
pm_runtime_idle(sdev->dev);
|
||||
}
|
||||
|
||||
return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
|
||||
}
|
||||
|
||||
static int imx8m_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
|
||||
{
|
||||
const struct sof_dsp_power_state target_dsp_state = {
|
||||
.state = target_state,
|
||||
};
|
||||
|
||||
if (!pm_runtime_suspended(sdev->dev))
|
||||
imx8m_suspend(sdev);
|
||||
|
||||
return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
|
||||
}
|
||||
|
||||
/* i.MX8 ops */
|
||||
struct snd_sof_dsp_ops sof_imx8m_ops = {
|
||||
/* probe and remove */
|
||||
|
|
@ -237,6 +417,7 @@ struct snd_sof_dsp_ops sof_imx8m_ops = {
|
|||
.remove = imx8m_remove,
|
||||
/* DSP core boot */
|
||||
.run = imx8m_run,
|
||||
.reset = imx8m_reset,
|
||||
|
||||
/* Block IO */
|
||||
.block_read = sof_block_read,
|
||||
|
|
@ -275,6 +456,14 @@ struct snd_sof_dsp_ops sof_imx8m_ops = {
|
|||
.drv = imx8m_dai,
|
||||
.num_drv = ARRAY_SIZE(imx8m_dai),
|
||||
|
||||
.suspend = imx8m_dsp_suspend,
|
||||
.resume = imx8m_dsp_resume,
|
||||
|
||||
.runtime_suspend = imx8m_dsp_runtime_suspend,
|
||||
.runtime_resume = imx8m_dsp_runtime_resume,
|
||||
|
||||
.set_power_state = imx8m_dsp_set_power_state,
|
||||
|
||||
.hw_info = SNDRV_PCM_INFO_MMAP |
|
||||
SNDRV_PCM_INFO_MMAP_VALID |
|
||||
SNDRV_PCM_INFO_INTERLEAVED |
|
||||
|
|
|
|||
Loading…
Reference in a new issue