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usb: dwc-meson-g12a: Add support for USB on AXG SoCs
The Amlogic AXG is close to the GXL Glue but with a single OTG PHY. It needs the same init sequence as GXL & GXM, but it seems it doesn't need the host disconnect bit. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
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1 changed files with 18 additions and 0 deletions
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@ -127,6 +127,7 @@ static const char * const meson_g12a_phy_names[] = {
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/*
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* Amlogic A1 has a single physical PHY, in slot 1, but still has the
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* two U2 PHY controls register blocks like G12A.
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* AXG has the similar scheme, thus needs the same tweak.
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* Handling the first PHY on slot 1 would need a large amount of code
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* changes, and the current management is generic enough to handle it
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* correctly when only the "usb2-phy1" phy is specified on-par with the
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@ -215,6 +216,19 @@ static struct dwc3_meson_g12a_drvdata gxm_drvdata = {
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.usb_post_init = dwc3_meson_gxl_usb_post_init,
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};
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static struct dwc3_meson_g12a_drvdata axg_drvdata = {
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.otg_switch_supported = true,
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.clks = meson_gxl_clocks,
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.num_clks = ARRAY_SIZE(meson_gxl_clocks),
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.phy_names = meson_a1_phy_names,
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.num_phys = ARRAY_SIZE(meson_a1_phy_names),
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.setup_regmaps = dwc3_meson_gxl_setup_regmaps,
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.usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
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.set_phy_mode = dwc3_meson_gxl_set_phy_mode,
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.usb_init = dwc3_meson_g12a_usb_init,
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.usb_post_init = dwc3_meson_gxl_usb_post_init,
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};
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static struct dwc3_meson_g12a_drvdata g12a_drvdata = {
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.otg_switch_supported = true,
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.clks = meson_g12a_clocks,
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@ -923,6 +937,10 @@ static const struct of_device_id dwc3_meson_g12a_match[] = {
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.compatible = "amlogic,meson-gxm-usb-ctrl",
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.data = &gxm_drvdata,
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},
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{
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.compatible = "amlogic,meson-axg-usb-ctrl",
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.data = &axg_drvdata,
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},
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{
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.compatible = "amlogic,meson-g12a-usb-ctrl",
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.data = &g12a_drvdata,
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