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MIPS: BCM63XX: fix revision ID width
The REVID is only 8 bit wide. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5007/ Acked-by: John Crispin <blogic@openwrt.org>
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4 changed files with 5 additions and 5 deletions
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@ -25,7 +25,7 @@ const int *bcm63xx_irqs;
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EXPORT_SYMBOL(bcm63xx_irqs);
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EXPORT_SYMBOL(bcm63xx_irqs);
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static u16 bcm63xx_cpu_id;
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static u16 bcm63xx_cpu_id;
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static u16 bcm63xx_cpu_rev;
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static u8 bcm63xx_cpu_rev;
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static unsigned int bcm63xx_cpu_freq;
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static unsigned int bcm63xx_cpu_freq;
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static unsigned int bcm63xx_memory_size;
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static unsigned int bcm63xx_memory_size;
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@ -87,7 +87,7 @@ u16 __bcm63xx_get_cpu_id(void)
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EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
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EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
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u16 bcm63xx_get_cpu_rev(void)
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u8 bcm63xx_get_cpu_rev(void)
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{
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{
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return bcm63xx_cpu_rev;
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return bcm63xx_cpu_rev;
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}
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}
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@ -126,7 +126,7 @@ static void __bcm63xx_machine_reboot(char *p)
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const char *get_system_type(void)
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const char *get_system_type(void)
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{
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{
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static char buf[128];
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static char buf[128];
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snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
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snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)",
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board_get_name(),
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board_get_name(),
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bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
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bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
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return buf;
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return buf;
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@ -18,7 +18,7 @@
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void __init bcm63xx_cpu_init(void);
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void __init bcm63xx_cpu_init(void);
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u16 __bcm63xx_get_cpu_id(void);
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u16 __bcm63xx_get_cpu_id(void);
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u16 bcm63xx_get_cpu_rev(void);
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u8 bcm63xx_get_cpu_rev(void);
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unsigned int bcm63xx_get_cpu_freq(void);
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unsigned int bcm63xx_get_cpu_freq(void);
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#ifdef CONFIG_BCM63XX_CPU_6328
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#ifdef CONFIG_BCM63XX_CPU_6328
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@ -10,7 +10,7 @@
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#define REV_CHIPID_SHIFT 16
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#define REV_CHIPID_SHIFT 16
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#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
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#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
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#define REV_REVID_SHIFT 0
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#define REV_REVID_SHIFT 0
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#define REV_REVID_MASK (0xffff << REV_REVID_SHIFT)
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#define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
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/* Clock Control register */
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/* Clock Control register */
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#define PERF_CKCTL_REG 0x4
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#define PERF_CKCTL_REG 0x4
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