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ARM: spear: convert to MULTI_IRQ_HANDLER
Now that there is a generic IRQ handler for multiple VIC devices use it for spear to help building multi platform kernels. Acked-by: Viresh Kumar <viresh.kumar@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
This commit is contained in:
parent
774b51f8f8
commit
66266f4ab8
7 changed files with 9 additions and 63 deletions
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@ -955,6 +955,7 @@ config PLAT_SPEAR
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select HAVE_CLK
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select MULTI_IRQ_HANDLER
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help
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Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
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@ -11,35 +11,8 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware/vic.h>
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#include <mach/hardware.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
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ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
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teq \irqstat, #0
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beq 1001f @ this will set/reset
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@ zero register
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/*
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* Following code will find bit position of least significang
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* bit set in irqstat, using following equation
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* least significant bit set in n = (n & ~(n-1))
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*/
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sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
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mvn \tmp, \tmp @ tmp = ~tmp
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and \irqstat, \irqstat, \tmp @ irqstat &= tmp
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/* Now, irqstat is = bit no. of 1st bit set in vic irq status */
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clz \tmp, \irqstat @ tmp = leading zeros
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rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
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1001: /* EQ will be set if no irqs pending */
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.endm
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@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/generic.h>
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@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
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.atag_offset = 0x100,
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.map_io = spear3xx_map_io,
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.init_irq = spear3xx_init_irq,
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.handle_irq = vic_handle_irq,
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.timer = &spear3xx_timer,
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.init_machine = spear300_evb_init,
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MACHINE_END
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@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/generic.h>
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@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
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.atag_offset = 0x100,
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.map_io = spear3xx_map_io,
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.init_irq = spear3xx_init_irq,
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.handle_irq = vic_handle_irq,
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.timer = &spear3xx_timer,
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.init_machine = spear310_evb_init,
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MACHINE_END
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@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/generic.h>
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@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
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.atag_offset = 0x100,
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.map_io = spear3xx_map_io,
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.init_irq = spear3xx_init_irq,
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.handle_irq = vic_handle_irq,
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.timer = &spear3xx_timer,
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.init_machine = spear320_evb_init,
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MACHINE_END
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@ -11,44 +11,8 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware/vic.h>
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#include <mach/hardware.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
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ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
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mov \irqnr, #0
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teq \irqstat, #0
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bne 1001f
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ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
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ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
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teq \irqstat, #0
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beq 1002f @ this will set/reset
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@ zero register
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mov \irqnr, #32
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1001:
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/*
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* Following code will find bit position of least significang
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* bit set in irqstat, using following equation
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* least significant bit set in n = (n & ~(n-1))
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*/
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sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
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mvn \tmp, \tmp @ tmp = ~tmp
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and \irqstat, \irqstat, \tmp @ irqstat &= tmp
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/* Now, irqstat is = bit no. of 1st bit set in vic irq status */
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clz \tmp, \irqstat @ tmp = leading zeros
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rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
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add \irqnr, \irqnr, \tmp
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1002: /* EQ will be set if no irqs pending */
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.endm
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@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/generic.h>
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@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
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.atag_offset = 0x100,
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.map_io = spear6xx_map_io,
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.init_irq = spear6xx_init_irq,
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.handle_irq = vic_handle_irq,
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.timer = &spear6xx_timer,
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.init_machine = spear600_evb_init,
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MACHINE_END
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