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arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlays for serial modes 

The imx8mm-venice-gw73xx-0x som+baseboard combination has a multi-protocol
RS-232/RS-485/RS-422 transceiver to an off-board connector which
can be configured in a number of ways via UART and GPIO configuration.

The default configuration per the imx8mm-venice-gw73xx-0x dts is for
UART2 TX/RX and UART4 TX/RX to be available as RS-232:
 J15.1 UART2 TX out
 J15.2 UART2 RX in
 J15.3 UART4 TX out
 J15.4 UART4 RX in
 J15.5 GND

Add dt overlays to allow additional the modes of operation:

rs232-rts (UART2 RS-232 with RTS/CTS hardware flow control)
 J15.1 TX out
 J15.2 RX in
 J15.3 RTS out
 J15.4 CTS in
 J15.5 GND

rs485 (UART2 RS-485 half duplex)
 J15.1 TXRX-
 J15.2 N/C
 J15.3 TXRX+
 J15.4 N/C
 J15.5 GND

rs422 (UART2 RS-422 full duplex)
 J15.1 TX-
 J15.2 RX+
 J15.3 TX+
 J15.4 RX-
 J15.5 GND

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Tim Harvey 2022-02-14 15:14:21 -08:00 committed by Shawn Guo
parent a72ba91e5b
commit 665f7f1ce8
4 changed files with 183 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm64/boot/dts/freescale/Makefile
View File

@ -99,6 +99,14 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
imx8mm-venice-gw73xx-0x-rs232-rts-dtbs := imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs232-rts.dtbo
imx8mm-venice-gw73xx-0x-rs422-dtbs := imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs422.dtbo
imx8mm-venice-gw73xx-0x-rs485-dtbs := imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs485.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs232-rts.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs422.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs485.dtb
dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb
dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb
dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb

53
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dts Normal file
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@ -0,0 +1,53 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 Gateworks Corporation
*
* GW73xx RS232 with RTS/CTS hardware flow control:
* - GPIO4_0 rs485_en needs to be driven low (in-active)
* - UART4_TX becomes RTS
* - UART4_RX becomes CTS
*/
#include <dt-bindings/gpio/gpio.h>
#include "imx8mm-pinfunc.h"
/dts-v1/;
/plugin/;
&{/} {
compatible = "gw,imx8mm-gw73xx-0x";
};
&gpio4 {
rs485_en {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "rs485_en";
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay";
};
&uart4 {
status = "disabled";
};
&iomuxc {
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x140
>;
};
};

61
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dts Normal file
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@ -0,0 +1,61 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2021 Gateworks Corporation
*
* GW73xx RS422 (RS485 full duplex):
* - GPIO1_0 rs485_term selects on-chip termination
* - GPIO4_0 rs485_en needs to be driven high (active)
* - GPIO4_2 rs485_hd needs to be driven low (in-active)
* - UART4_TX is DE for RS485 transmitter
* - RS485_EN needs to be pulled high
* - RS485_HALF needs to be low
*/
#include <dt-bindings/gpio/gpio.h>
#include "imx8mm-pinfunc.h"
/dts-v1/;
/plugin/;
&{/} {
compatible = "gw,imx8mm-gw73xx-0x";
};
&gpio4 {
rs485_en {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "rs485_en";
};
rs485_hd {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "rs485_hd";
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
&uart4 {
status = "disabled";
};
&iomuxc {
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
>;
};
};

61
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dts Normal file
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@ -0,0 +1,61 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2021 Gateworks Corporation
*
* GW73xx RS485 HD:
* - GPIO1_0 rs485_term selects on-chip termination
* - GPIO4_0 rs485_en needs to be driven high (active)
* - GPIO4_2 rs485_hd needs to be driven high (active)
* - UART4_TX is DE for RS485 transmitter
* - RS485_EN needs to be pulled high
* - RS485_HALF needs to be pulled high
*/
#include <dt-bindings/gpio/gpio.h>
#include "imx8mm-pinfunc.h"
/dts-v1/;
/plugin/;
&{/} {
compatible = "gw,imx8mm-gw73xx-0x";
};
&gpio4 {
rs485_en {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "rs485_en";
};
rs485_hd {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "rs485_hd";
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
&uart4 {
status = "disabled";
};
&iomuxc {
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
>;
};
};