mips: bmips: bcm63268: populate device tree nodes
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add HS SPI controller - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Álvaro Fernández Rojas
Thomas Bogendoerfer
parent
7d9ade0f52
commit
666c1fc90c
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@ -29,16 +29,29 @@
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};
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clocks {
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periph_clk: periph-clk {
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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hsspi_osc: hsspi-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <400000000>;
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clock-output-names = "hsspi_osc";
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};
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};
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aliases {
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nflash = &nflash;
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serial0 = &uart0;
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serial1 = &uart1;
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spi0 = &lsspi;
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spi1 = &hsspi;
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};
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cpu_intc: interrupt-controller {
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@ -56,23 +69,22 @@
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compatible = "simple-bus";
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ranges;
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clkctl: clock-controller@10000004 {
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periph_clk: clock-controller@10000004 {
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compatible = "brcm,bcm63268-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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periph_cntl: syscon@10000008 {
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pll_cntl: syscon@10000008 {
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compatible = "syscon";
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reg = <0x10000008 0x4>;
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native-endian;
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};
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reboot: syscon-reboot@10000008 {
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compatible = "syscon-reboot";
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regmap = <&periph_cntl>;
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offset = <0x0>;
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mask = <0x1>;
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reboot {
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compatible = "syscon-reboot";
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offset = <0x0>;
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mask = <0x1>;
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};
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};
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periph_rst: reset-controller@10000010 {
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@ -93,6 +105,16 @@
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interrupts = <2>, <3>;
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};
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wdt: watchdog@1000009c {
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compatible = "brcm,bcm7038-wdt";
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reg = <0x1000009c 0xc>;
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clocks = <&periph_osc>;
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clock-names = "refclk";
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timeout-sec = <30>;
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};
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uart0: serial@10000180 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000180 0x18>;
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@ -100,12 +122,34 @@
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interrupt-parent = <&periph_intc>;
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interrupts = <5>;
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clocks = <&periph_clk>;
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clocks = <&periph_osc>;
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clock-names = "refclk";
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status = "disabled";
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};
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nflash: nand@10000200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,nand-bcm6368",
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"brcm,brcmnand-v4.0",
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"brcm,brcmnand";
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reg = <0x10000200 0x180>,
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<0x10000600 0x200>,
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<0x100000b0 0x10>;
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reg-names = "nand",
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"nand-cache",
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"nand-int-base";
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interrupt-parent = <&periph_intc>;
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interrupts = <50>;
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clocks = <&periph_clk BCM63268_CLK_NAND>;
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clock-names = "nand";
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status = "disabled";
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};
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uart1: serial@100001a0 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x100001a0 0x18>;
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@ -113,12 +157,54 @@
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interrupt-parent = <&periph_intc>;
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interrupts = <34>;
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clocks = <&periph_clk>;
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clocks = <&periph_osc>;
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clock-names = "refclk";
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status = "disabled";
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};
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lsspi: spi@10000800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6358-spi";
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reg = <0x10000800 0x70c>;
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interrupt-parent = <&periph_intc>;
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interrupts = <80>;
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clocks = <&periph_clk BCM63268_CLK_SPI>;
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clock-names = "spi";
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resets = <&periph_rst BCM63268_RST_SPI>;
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status = "disabled";
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};
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hsspi: spi@10001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-hsspi";
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reg = <0x10001000 0x600>;
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interrupt-parent = <&periph_intc>;
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interrupts = <6>;
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clocks = <&periph_clk BCM63268_CLK_HSSPI>,
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<&hsspi_osc>;
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clock-names = "hsspi",
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"pll";
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resets = <&periph_rst BCM63268_RST_SPI>;
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status = "disabled";
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};
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periph_pwr: power-controller@1000184c {
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compatible = "brcm,bcm6328-power-controller";
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reg = <0x1000184c 0x4>;
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#power-domain-cells = <1>;
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};
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leds0: led-controller@10001900 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -128,12 +214,6 @@
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status = "disabled";
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};
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periph_pwr: power-controller@1000184c {
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compatible = "brcm,bcm6328-power-controller";
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reg = <0x1000184c 0x4>;
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#power-domain-cells = <1>;
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};
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ehci: usb@10002500 {
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compatible = "brcm,bcm63268-ehci", "generic-ehci";
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reg = <0x10002500 0x100>;
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@ -142,6 +222,9 @@
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interrupt-parent = <&periph_intc>;
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interrupts = <10>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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@ -154,6 +237,25 @@
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interrupt-parent = <&periph_intc>;
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interrupts = <9>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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usbh: usb-phy@10002700 {
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compatible = "brcm,bcm63268-usbh-phy";
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reg = <0x10002700 0x38>;
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#phy-cells = <1>;
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clocks = <&periph_clk BCM63268_CLK_USBH>;
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clock-names = "usbh";
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power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
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resets = <&periph_rst BCM63268_RST_USBH>;
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reset-names = "usbh";
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status = "disabled";
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};
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};
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