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Intel Wired LAN drivers: Use static const
Based on work by Joe Perches <joe@perches.com> Using static const to decrease data and overall object size. CC: Joe Perches <joe@perches.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com>
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19a0b67afd
commit
667445008d
7 changed files with 65 additions and 53 deletions
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@ -4892,11 +4892,11 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
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} else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */
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u16 cur_agc_value;
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u16 min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
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u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
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{ IGP01E1000_PHY_AGC_A,
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IGP01E1000_PHY_AGC_B,
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IGP01E1000_PHY_AGC_C,
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IGP01E1000_PHY_AGC_D
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static const u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {
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IGP01E1000_PHY_AGC_A,
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IGP01E1000_PHY_AGC_B,
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IGP01E1000_PHY_AGC_C,
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IGP01E1000_PHY_AGC_D
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};
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/* Read the AGC registers for all channels */
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for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
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@ -5071,11 +5071,11 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
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{
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s32 ret_val;
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u16 phy_data, phy_saved_data, speed, duplex, i;
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u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
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{ IGP01E1000_PHY_AGC_PARAM_A,
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IGP01E1000_PHY_AGC_PARAM_B,
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IGP01E1000_PHY_AGC_PARAM_C,
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IGP01E1000_PHY_AGC_PARAM_D
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static const u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {
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IGP01E1000_PHY_AGC_PARAM_A,
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IGP01E1000_PHY_AGC_PARAM_B,
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IGP01E1000_PHY_AGC_PARAM_C,
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IGP01E1000_PHY_AGC_PARAM_D
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};
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u16 min_length, max_length;
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@ -352,12 +352,13 @@ void __devinit e1000_check_options(struct e1000_adapter *adapter)
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}
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{ /* Flow Control */
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struct e1000_opt_list fc_list[] =
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{{ E1000_FC_NONE, "Flow Control Disabled" },
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{ E1000_FC_RX_PAUSE,"Flow Control Receive Only" },
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{ E1000_FC_TX_PAUSE,"Flow Control Transmit Only" },
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{ E1000_FC_FULL, "Flow Control Enabled" },
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{ E1000_FC_DEFAULT, "Flow Control Hardware Default" }};
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static const struct e1000_opt_list fc_list[] = {
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{ E1000_FC_NONE, "Flow Control Disabled" },
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{ E1000_FC_RX_PAUSE, "Flow Control Receive Only" },
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{ E1000_FC_TX_PAUSE, "Flow Control Transmit Only" },
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{ E1000_FC_FULL, "Flow Control Enabled" },
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{ E1000_FC_DEFAULT, "Flow Control Hardware Default" }
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};
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opt = (struct e1000_option) {
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.type = list_option,
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@ -1840,11 +1840,12 @@ s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw)
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u16 phy_data, i, agc_value = 0;
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u16 cur_agc_index, max_agc_index = 0;
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u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
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u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
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{IGP02E1000_PHY_AGC_A,
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IGP02E1000_PHY_AGC_B,
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IGP02E1000_PHY_AGC_C,
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IGP02E1000_PHY_AGC_D};
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static const u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = {
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IGP02E1000_PHY_AGC_A,
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IGP02E1000_PHY_AGC_B,
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IGP02E1000_PHY_AGC_C,
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IGP02E1000_PHY_AGC_D
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};
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/* Read the AGC registers for all channels */
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for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
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@ -1757,11 +1757,12 @@ s32 igb_get_cable_length_igp_2(struct e1000_hw *hw)
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u16 phy_data, i, agc_value = 0;
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u16 cur_agc_index, max_agc_index = 0;
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u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
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u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
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{IGP02E1000_PHY_AGC_A,
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IGP02E1000_PHY_AGC_B,
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IGP02E1000_PHY_AGC_C,
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IGP02E1000_PHY_AGC_D};
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static const u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = {
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IGP02E1000_PHY_AGC_A,
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IGP02E1000_PHY_AGC_B,
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IGP02E1000_PHY_AGC_C,
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IGP02E1000_PHY_AGC_D
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};
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/* Read the AGC registers for all channels */
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for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
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@ -191,9 +191,9 @@ struct ixgb_option {
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} r;
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struct { /* list_option info */
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int nr;
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struct ixgb_opt_list {
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const struct ixgb_opt_list {
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int i;
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char *str;
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const char *str;
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} *p;
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} l;
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} arg;
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@ -226,7 +226,7 @@ ixgb_validate_option(unsigned int *value, const struct ixgb_option *opt)
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break;
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case list_option: {
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int i;
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struct ixgb_opt_list *ent;
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const struct ixgb_opt_list *ent;
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for (i = 0; i < opt->arg.l.nr; i++) {
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ent = &opt->arg.l.p[i];
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@ -322,14 +322,15 @@ ixgb_check_options(struct ixgb_adapter *adapter)
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}
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{ /* Flow Control */
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struct ixgb_opt_list fc_list[] =
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{{ ixgb_fc_none, "Flow Control Disabled" },
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{ ixgb_fc_rx_pause,"Flow Control Receive Only" },
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{ ixgb_fc_tx_pause,"Flow Control Transmit Only" },
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{ ixgb_fc_full, "Flow Control Enabled" },
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{ ixgb_fc_default, "Flow Control Hardware Default" }};
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static const struct ixgb_opt_list fc_list[] = {
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{ ixgb_fc_none, "Flow Control Disabled" },
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{ ixgb_fc_rx_pause, "Flow Control Receive Only" },
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{ ixgb_fc_tx_pause, "Flow Control Transmit Only" },
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{ ixgb_fc_full, "Flow Control Enabled" },
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{ ixgb_fc_default, "Flow Control Hardware Default" }
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};
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const struct ixgb_option opt = {
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static const struct ixgb_option opt = {
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.type = list_option,
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.name = "Flow Control",
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.err = "reading default settings from EEPROM",
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@ -1157,7 +1157,7 @@ struct ixgbe_reg_test {
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#define TABLE64_TEST_HI 6
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/* default 82599 register test */
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static struct ixgbe_reg_test reg_test_82599[] = {
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static const struct ixgbe_reg_test reg_test_82599[] = {
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{ IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
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{ IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
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{ IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
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@ -1181,7 +1181,7 @@ static struct ixgbe_reg_test reg_test_82599[] = {
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};
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/* default 82598 register test */
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static struct ixgbe_reg_test reg_test_82598[] = {
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static const struct ixgbe_reg_test reg_test_82598[] = {
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{ IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
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{ IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
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{ IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
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@ -1208,18 +1208,22 @@ static struct ixgbe_reg_test reg_test_82598[] = {
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{ 0, 0, 0, 0 }
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};
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static const u32 register_test_patterns[] = {
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0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
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};
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#define REG_PATTERN_TEST(R, M, W) \
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{ \
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u32 pat, val, before; \
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const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
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for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { \
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for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) { \
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before = readl(adapter->hw.hw_addr + R); \
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writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \
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writel((register_test_patterns[pat] & W), \
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(adapter->hw.hw_addr + R)); \
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val = readl(adapter->hw.hw_addr + R); \
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if (val != (_test[pat] & W & M)) { \
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e_err(drv, "pattern test reg %04X failed: got " \
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"0x%08X expected 0x%08X\n", \
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R, val, (_test[pat] & W & M)); \
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if (val != (register_test_patterns[pat] & W & M)) { \
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e_err(drv, "pattern test reg %04X failed: got " \
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"0x%08X expected 0x%08X\n", \
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R, val, (register_test_patterns[pat] & W & M)); \
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*data = R; \
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writel(before, adapter->hw.hw_addr + R); \
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return 1; \
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@ -1246,7 +1250,7 @@ static struct ixgbe_reg_test reg_test_82598[] = {
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static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
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{
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struct ixgbe_reg_test *test;
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const struct ixgbe_reg_test *test;
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u32 value, before, after;
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u32 i, toggle;
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@ -544,7 +544,7 @@ struct ixgbevf_reg_test {
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#define TABLE64_TEST_HI 6
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/* default VF register test */
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static struct ixgbevf_reg_test reg_test_vf[] = {
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static const struct ixgbevf_reg_test reg_test_vf[] = {
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{ IXGBE_VFRDBAL(0), 2, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
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{ IXGBE_VFRDBAH(0), 2, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
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{ IXGBE_VFRDLEN(0), 2, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
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@ -557,19 +557,23 @@ static struct ixgbevf_reg_test reg_test_vf[] = {
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{ 0, 0, 0, 0 }
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};
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static const u32 register_test_patterns[] = {
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0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
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};
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#define REG_PATTERN_TEST(R, M, W) \
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{ \
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u32 pat, val, before; \
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const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
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for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { \
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for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) { \
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before = readl(adapter->hw.hw_addr + R); \
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writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \
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writel((register_test_patterns[pat] & W), \
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(adapter->hw.hw_addr + R)); \
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val = readl(adapter->hw.hw_addr + R); \
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if (val != (_test[pat] & W & M)) { \
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if (val != (register_test_patterns[pat] & W & M)) { \
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hw_dbg(&adapter->hw, \
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"pattern test reg %04X failed: got " \
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"0x%08X expected 0x%08X\n", \
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R, val, (_test[pat] & W & M)); \
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R, val, (register_test_patterns[pat] & W & M)); \
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*data = R; \
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writel(before, adapter->hw.hw_addr + R); \
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return 1; \
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@ -596,7 +600,7 @@ static struct ixgbevf_reg_test reg_test_vf[] = {
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static int ixgbevf_reg_test(struct ixgbevf_adapter *adapter, u64 *data)
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{
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struct ixgbevf_reg_test *test;
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const struct ixgbevf_reg_test *test;
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u32 i;
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test = reg_test_vf;
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