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RDMA/hns: Fix error code of CMD

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The error code is fixed to EIO when CMD fails to excute. This patch
converts the error status reported by firmware to linux errno.

Fixes: a04ff739f2 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Link: https://lore.kernel.org/r/20221126102911.2921820-6-xuhaoyue1@hisilicon.com
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Chengchang Tang 2022-11-26 18:29:10 +08:00 committed by Jason Gunthorpe
parent 99dc5a0712
commit 667d6164b8
2 changed files with 30 additions and 1 deletions
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26
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
View file

@ -1277,6 +1277,30 @@ static void update_cmdq_status(struct hns_roce_dev *hr_dev)
hr_dev->cmd.state = HNS_ROCE_CMDQ_STATE_FATAL_ERR;
}
static int hns_roce_cmd_err_convert_errno(u16 desc_ret)
{
struct hns_roce_cmd_errcode errcode_table[] = {
{CMD_EXEC_SUCCESS, 0},
{CMD_NO_AUTH, -EPERM},
{CMD_NOT_EXIST, -EOPNOTSUPP},
{CMD_CRQ_FULL, -EXFULL},
{CMD_NEXT_ERR, -ENOSR},
{CMD_NOT_EXEC, -ENOTBLK},
{CMD_PARA_ERR, -EINVAL},
{CMD_RESULT_ERR, -ERANGE},
{CMD_TIMEOUT, -ETIME},
{CMD_HILINK_ERR, -ENOLINK},
{CMD_INFO_ILLEGAL, -ENXIO},
{CMD_INVALID, -EBADR},
};
u16 i;
for (i = 0; i < ARRAY_SIZE(errcode_table); i++)
if (desc_ret == errcode_table[i].return_status)
return errcode_table[i].errno;
return -EIO;
}
static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
struct hns_roce_cmq_desc *desc, int num)
{
@ -1322,7 +1346,7 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
dev_err_ratelimited(hr_dev->dev,
"Cmdq IO error, opcode = 0x%x, return = 0x%x.\n",
desc->opcode, desc_ret);
ret = -EIO;
ret = hns_roce_cmd_err_convert_errno(desc_ret);
}
} else {
/* FW/HW reset or incorrect number of desc */

5
drivers/infiniband/hw/hns/hns_roce_hw_v2.h
View file

@ -273,6 +273,11 @@ enum hns_roce_cmd_return_status {
CMD_OTHER_ERR = 0xff
};
struct hns_roce_cmd_errcode {
enum hns_roce_cmd_return_status return_status;
int errno;
};
enum hns_roce_sgid_type {
GID_TYPE_FLAG_ROCE_V1 = 0,
GID_TYPE_FLAG_ROCE_V2_IPV4,