mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-01 22:54:01 +00:00
Code Issues Releases Wiki Activity

arm: kirkwood: add SoC-level Device Tree data for PCIe interfaces

Browse source 
This commit adds Device Tree details to enable the PCIe interfaces on
Kirkwood. The 6281 has one PCIe interface, the 6282 has two PCIe
interfaces.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Thomas Petazzoni 2013-05-15 15:36:56 +02:00 committed by Jason Cooper
parent 5afb9fe367
commit 670ee03ccc
3 changed files with 80 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

31
arch/arm/boot/dts/kirkwood-6281.dtsi
View file

@ -40,5 +40,36 @@ pmx_sdio: pmx-sdio {
marvell,function = "sdio";
};
};
pcie-controller {
compatible = "marvell,kirkwood-pcie";
status = "disabled";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc 9>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>;
status = "disabled";
};
};
};
};

48
arch/arm/boot/dts/kirkwood-6282.dtsi
View file

@ -65,5 +65,53 @@ i2c@11100 {
clocks = <&gate_clk 7>;
status = "disabled";
};
pcie-controller {
compatible = "marvell,kirkwood-pcie";
status = "disabled";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0x00044000 0x00044000 0 0x00002000 /* Port 1.0 registers */
0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc 9>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>;
status = "disabled";
};
pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc 10>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 18>;
status = "disabled";
};
};
};
};

1
arch/arm/boot/dts/kirkwood.dtsi
View file

@ -19,6 +19,7 @@ intc: interrupt-controller {
ocp@f1000000 {
compatible = "simple-bus";
ranges = <0x00000000 0xf1000000 0x4000000
0xe0000000 0xe0000000 0x8100000 /* PCIE */
0xf5000000 0xf5000000 0x0000400>;
#address-cells = <1>;
#size-cells = <1>;