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memory: tegra: Correct num_tlb_lines for tegra210

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According to Tegra210 TRM, the default value of TLB_ACTIVE_LINES
field of register MC_SMMU_TLB_CONFIG_0 is 0x30. So num_tlb_lines
should be 48 (0x30) rather than 32 (0x20).

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200917113155.13438-3-nicoleotsuka@gmail.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Nicolin Chen 2020-09-17 04:31:55 -07:00 committed by Joerg Roedel
parent d5c152c340
commit 675d12acb6
1 changed files with 1 additions and 1 deletions
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2
drivers/memory/tegra/tegra210.c
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@ -1073,7 +1073,7 @@ static const struct tegra_smmu_soc tegra210_smmu_soc = {
.num_groups = ARRAY_SIZE(tegra210_groups),
.supports_round_robin_arbitration = true,
.supports_request_limit = true,
.num_tlb_lines = 32,
.num_tlb_lines = 48,
.num_asids = 128,
};