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GPIO: gpio-dwapb: Change readl&writel to dwapb_read&dwapb_write
This patch replaces 'readl&writel' with 'dwapb_read&dwapb_write'. Reviewed-by: Shevchenko, Andriy <andriy.shevchenko@intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
3d2613c428
commit
67809b974a
1 changed files with 27 additions and 10 deletions
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@ -64,6 +64,23 @@ struct dwapb_gpio {
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struct irq_domain *domain;
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};
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static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
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{
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struct bgpio_chip *bgc = &gpio->ports[0].bgc;
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void __iomem *reg_base = gpio->regs;
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return bgc->read_reg(reg_base + offset);
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}
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static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
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u32 val)
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{
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struct bgpio_chip *bgc = &gpio->ports[0].bgc;
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void __iomem *reg_base = gpio->regs;
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bgc->write_reg(reg_base + offset, val);
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}
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static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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@ -76,14 +93,14 @@ static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
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{
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u32 v = readl(gpio->regs + GPIO_INT_POLARITY);
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u32 v = dwapb_read(gpio, GPIO_INT_POLARITY);
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if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs))
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v &= ~BIT(offs);
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else
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v |= BIT(offs);
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writel(v, gpio->regs + GPIO_INT_POLARITY);
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dwapb_write(gpio, GPIO_INT_POLARITY, v);
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}
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static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
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@ -126,9 +143,9 @@ static void dwapb_irq_enable(struct irq_data *d)
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u32 val;
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spin_lock_irqsave(&bgc->lock, flags);
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val = readl(gpio->regs + GPIO_INTEN);
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val = dwapb_read(gpio, GPIO_INTEN);
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val |= BIT(d->hwirq);
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writel(val, gpio->regs + GPIO_INTEN);
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dwapb_write(gpio, GPIO_INTEN, val);
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spin_unlock_irqrestore(&bgc->lock, flags);
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}
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@ -141,9 +158,9 @@ static void dwapb_irq_disable(struct irq_data *d)
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u32 val;
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spin_lock_irqsave(&bgc->lock, flags);
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val = readl(gpio->regs + GPIO_INTEN);
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val = dwapb_read(gpio, GPIO_INTEN);
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val &= ~BIT(d->hwirq);
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writel(val, gpio->regs + GPIO_INTEN);
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dwapb_write(gpio, GPIO_INTEN, val);
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spin_unlock_irqrestore(&bgc->lock, flags);
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}
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@ -183,8 +200,8 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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return -EINVAL;
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spin_lock_irqsave(&bgc->lock, flags);
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level = readl(gpio->regs + GPIO_INTTYPE_LEVEL);
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polarity = readl(gpio->regs + GPIO_INT_POLARITY);
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level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
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polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
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switch (type) {
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case IRQ_TYPE_EDGE_BOTH:
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@ -211,8 +228,8 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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irq_setup_alt_chip(d, type);
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writel(level, gpio->regs + GPIO_INTTYPE_LEVEL);
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writel(polarity, gpio->regs + GPIO_INT_POLARITY);
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dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
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dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
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spin_unlock_irqrestore(&bgc->lock, flags);
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return 0;
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