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dmaengine: hdmac: Add scatter-gathered memset support
Just like memset support, the HDMAC might be used to do a memset over a discontiguous memory area. In such a case, we'll just build up a chain of memset descriptors over the contiguous chunks of memory to set, in order to allow such a support. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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1 changed files with 79 additions and 0 deletions
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@ -986,6 +986,83 @@ atc_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value,
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return NULL;
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}
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static struct dma_async_tx_descriptor *
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atc_prep_dma_memset_sg(struct dma_chan *chan,
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struct scatterlist *sgl,
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unsigned int sg_len, int value,
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unsigned long flags)
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{
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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struct at_dma *atdma = to_at_dma(chan->device);
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struct at_desc *desc = NULL, *first = NULL, *prev = NULL;
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struct scatterlist *sg;
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void __iomem *vaddr;
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dma_addr_t paddr;
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size_t total_len = 0;
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int i;
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dev_vdbg(chan2dev(chan), "%s: v0x%x l0x%zx f0x%lx\n", __func__,
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value, sg_len, flags);
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if (unlikely(!sgl || !sg_len)) {
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dev_dbg(chan2dev(chan), "%s: scatterlist is empty!\n",
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__func__);
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return NULL;
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}
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vaddr = dma_pool_alloc(atdma->memset_pool, GFP_ATOMIC, &paddr);
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if (!vaddr) {
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dev_err(chan2dev(chan), "%s: couldn't allocate buffer\n",
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__func__);
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return NULL;
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}
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*(u32*)vaddr = value;
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for_each_sg(sgl, sg, sg_len, i) {
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dma_addr_t dest = sg_dma_address(sg);
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size_t len = sg_dma_len(sg);
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dev_vdbg(chan2dev(chan), "%s: d0x%08x, l0x%zx\n",
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__func__, dest, len);
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if (!is_dma_fill_aligned(chan->device, dest, 0, len)) {
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dev_err(chan2dev(chan), "%s: buffer is not aligned\n",
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__func__);
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goto err_put_desc;
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}
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desc = atc_create_memset_desc(chan, paddr, dest, len);
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if (!desc)
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goto err_put_desc;
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atc_desc_chain(&first, &prev, desc);
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total_len += len;
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}
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/*
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* Only set the buffer pointers on the last descriptor to
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* avoid free'ing while we have our transfer still going
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*/
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desc->memset_paddr = paddr;
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desc->memset_vaddr = vaddr;
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desc->memset_buffer = true;
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first->txd.cookie = -EBUSY;
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first->total_len = total_len;
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/* set end-of-link on the descriptor */
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set_desc_eol(desc);
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first->txd.flags = flags;
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return &first->txd;
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err_put_desc:
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atc_desc_put(atchan, first);
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return NULL;
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}
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/**
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* atc_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction
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* @chan: DMA channel
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@ -1868,6 +1945,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
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dma_cap_set(DMA_INTERLEAVE, at91sam9g45_config.cap_mask);
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dma_cap_set(DMA_MEMCPY, at91sam9g45_config.cap_mask);
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dma_cap_set(DMA_MEMSET, at91sam9g45_config.cap_mask);
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dma_cap_set(DMA_MEMSET_SG, at91sam9g45_config.cap_mask);
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dma_cap_set(DMA_PRIVATE, at91sam9g45_config.cap_mask);
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dma_cap_set(DMA_SLAVE, at91sam9g45_config.cap_mask);
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dma_cap_set(DMA_SG, at91sam9g45_config.cap_mask);
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@ -1989,6 +2067,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
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if (dma_has_cap(DMA_MEMSET, atdma->dma_common.cap_mask)) {
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atdma->dma_common.device_prep_dma_memset = atc_prep_dma_memset;
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atdma->dma_common.device_prep_dma_memset_sg = atc_prep_dma_memset_sg;
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atdma->dma_common.fill_align = DMAENGINE_ALIGN_4_BYTES;
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}
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