mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-24 11:25:43 +00:00
Char/Misc driver fixes for 6.3-rc6
Here are a small set of various small driver changes for 6.3-rc6. Included in here are: - iio driver fixes for reported problems. - coresight hwtracing bugfix for reported problem - small counter driver bugfixes All have been in linux-next for a while with no reported problems. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZDFS3Q8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ylKGgCeMnB5X+eZXhuj3xTUjYHsXVqX4MUAn3rsMqVt zMHkQ76jJ85pTl4TFkBd =IJ45 -----END PGP SIGNATURE----- Merge tag 'char-misc-6.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver fixes from Greg KH: "Here are a small set of various small driver changes for 6.3-rc6. Included in here are: - iio driver fixes for reported problems - coresight hwtracing bugfix for reported problem - small counter driver bugfixes All have been in linux-next for a while with no reported problems" * tag 'char-misc-6.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: coresight: etm4x: Do not access TRCIDR1 for identification coresight-etm4: Fix for() loop drvdata->nr_addr_cmp range bug iio: adc: ti-ads7950: Set `can_sleep` flag for GPIO chip iio: adc: palmas_gpadc: fix NULL dereference on rmmod counter: 104-quad-8: Fix Synapse action reported for Index signals counter: 104-quad-8: Fix race condition between FLAG and CNTR reads iio: adc: max11410: fix read_poll_timeout() usage iio: dac: cio-dac: Fix max DAC write value check for 12-bit iio: light: cm32181: Unregister second I2C client if present iio: accel: kionix-kx022a: Get the timestamp from the driver's private data in the trigger_handler iio: adc: ad7791: fix IRQ flags iio: buffer: make sure O_NONBLOCK is respected iio: buffer: correctly return bytes written in output buffers iio: light: vcnl4000: Fix WARN_ON on uninitialized lock iio: adis16480: select CONFIG_CRC32 drivers: iio: adc: ltc2497: fix LSB shift iio: adc: qcom-spmi-adc5: Fix the channel name
This commit is contained in:
commit
68047c48b2
15 changed files with 84 additions and 77 deletions
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@ -97,10 +97,6 @@ struct quad8 {
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struct quad8_reg __iomem *reg;
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};
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/* Borrow Toggle flip-flop */
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#define QUAD8_FLAG_BT BIT(0)
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/* Carry Toggle flip-flop */
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#define QUAD8_FLAG_CT BIT(1)
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/* Error flag */
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#define QUAD8_FLAG_E BIT(4)
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/* Up/Down flag */
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@ -133,6 +129,9 @@ struct quad8 {
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#define QUAD8_CMR_QUADRATURE_X2 0x10
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#define QUAD8_CMR_QUADRATURE_X4 0x18
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/* Each Counter is 24 bits wide */
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#define LS7267_CNTR_MAX GENMASK(23, 0)
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static int quad8_signal_read(struct counter_device *counter,
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struct counter_signal *signal,
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enum counter_signal_level *level)
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@ -156,18 +155,10 @@ static int quad8_count_read(struct counter_device *counter,
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{
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struct quad8 *const priv = counter_priv(counter);
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struct channel_reg __iomem *const chan = priv->reg->channel + count->id;
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unsigned int flags;
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unsigned int borrow;
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unsigned int carry;
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unsigned long irqflags;
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int i;
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flags = ioread8(&chan->control);
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borrow = flags & QUAD8_FLAG_BT;
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carry = !!(flags & QUAD8_FLAG_CT);
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/* Borrow XOR Carry effectively doubles count range */
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*val = (unsigned long)(borrow ^ carry) << 24;
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*val = 0;
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spin_lock_irqsave(&priv->lock, irqflags);
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@ -191,8 +182,7 @@ static int quad8_count_write(struct counter_device *counter,
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unsigned long irqflags;
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int i;
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/* Only 24-bit values are supported */
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if (val > 0xFFFFFF)
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if (val > LS7267_CNTR_MAX)
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return -ERANGE;
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spin_lock_irqsave(&priv->lock, irqflags);
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@ -378,7 +368,7 @@ static int quad8_action_read(struct counter_device *counter,
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/* Handle Index signals */
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if (synapse->signal->id >= 16) {
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if (priv->preset_enable[count->id])
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if (!priv->preset_enable[count->id])
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*action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
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else
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*action = COUNTER_SYNAPSE_ACTION_NONE;
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@ -806,8 +796,7 @@ static int quad8_count_preset_write(struct counter_device *counter,
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struct quad8 *const priv = counter_priv(counter);
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unsigned long irqflags;
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/* Only 24-bit values are supported */
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if (preset > 0xFFFFFF)
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if (preset > LS7267_CNTR_MAX)
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return -ERANGE;
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spin_lock_irqsave(&priv->lock, irqflags);
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@ -834,8 +823,7 @@ static int quad8_count_ceiling_read(struct counter_device *counter,
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*ceiling = priv->preset[count->id];
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break;
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default:
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/* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
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*ceiling = 0x1FFFFFF;
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*ceiling = LS7267_CNTR_MAX;
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break;
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}
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@ -850,8 +838,7 @@ static int quad8_count_ceiling_write(struct counter_device *counter,
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struct quad8 *const priv = counter_priv(counter);
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unsigned long irqflags;
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/* Only 24-bit values are supported */
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if (ceiling > 0xFFFFFF)
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if (ceiling > LS7267_CNTR_MAX)
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return -ERANGE;
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spin_lock_irqsave(&priv->lock, irqflags);
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@ -472,7 +472,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
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if (etm4x_sspcicrn_present(drvdata, i))
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etm4x_relaxed_write32(csa, config->ss_pe_cmp[i], TRCSSPCICRn(i));
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}
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for (i = 0; i < drvdata->nr_addr_cmp; i++) {
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for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
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etm4x_relaxed_write64(csa, config->addr_val[i], TRCACVRn(i));
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etm4x_relaxed_write64(csa, config->addr_acc[i], TRCACATRn(i));
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}
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@ -1070,25 +1070,21 @@ static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata,
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struct csdev_access *csa)
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{
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u32 devarch = readl_relaxed(drvdata->base + TRCDEVARCH);
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u32 idr1 = readl_relaxed(drvdata->base + TRCIDR1);
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/*
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* All ETMs must implement TRCDEVARCH to indicate that
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* the component is an ETMv4. To support any broken
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* implementations we fall back to TRCIDR1 check, which
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* is not really reliable.
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* the component is an ETMv4. Even though TRCIDR1 also
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* contains the information, it is part of the "Trace"
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* register and must be accessed with the OSLK cleared,
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* with MMIO. But we cannot touch the OSLK until we are
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* sure this is an ETM. So rely only on the TRCDEVARCH.
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*/
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if ((devarch & ETM_DEVARCH_ID_MASK) == ETM_DEVARCH_ETMv4x_ARCH) {
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drvdata->arch = etm_devarch_to_arch(devarch);
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} else {
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pr_warn("CPU%d: ETM4x incompatible TRCDEVARCH: %x, falling back to TRCIDR1\n",
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smp_processor_id(), devarch);
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if (ETM_TRCIDR1_ARCH_MAJOR(idr1) != ETM_TRCIDR1_ARCH_ETMv4)
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if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) {
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pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n");
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return false;
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drvdata->arch = etm_trcidr_to_arch(idr1);
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}
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drvdata->arch = etm_devarch_to_arch(devarch);
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*csa = CSDEV_ACCESS_IOMEM(drvdata->base);
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return true;
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}
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@ -753,14 +753,12 @@
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* TRCDEVARCH - CoreSight architected register
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* - Bits[15:12] - Major version
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* - Bits[19:16] - Minor version
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* TRCIDR1 - ETM architected register
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* - Bits[11:8] - Major version
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* - Bits[7:4] - Minor version
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* We must rely on TRCDEVARCH for the version information,
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* however we don't want to break the support for potential
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* old implementations which might not implement it. Thus
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* we fall back to TRCIDR1 if TRCDEVARCH is not implemented
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* for memory mapped components.
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*
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* We must rely only on TRCDEVARCH for the version information. Even though,
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* TRCIDR1 also provides the architecture version, it is a "Trace" register
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* and as such must be accessed only with Trace power domain ON. This may
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* not be available at probe time.
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*
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* Now to make certain decisions easier based on the version
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* we use an internal representation of the version in the
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* driver, as follows :
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@ -786,12 +784,6 @@ static inline u8 etm_devarch_to_arch(u32 devarch)
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ETM_DEVARCH_REVISION(devarch));
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}
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static inline u8 etm_trcidr_to_arch(u32 trcidr1)
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{
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return ETM_ARCH_VERSION(ETM_TRCIDR1_ARCH_MAJOR(trcidr1),
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ETM_TRCIDR1_ARCH_MINOR(trcidr1));
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}
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enum etm_impdef_type {
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ETM4_IMPDEF_HISI_CORE_COMMIT,
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ETM4_IMPDEF_FEATURE_MAX,
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@ -864,7 +864,7 @@ static irqreturn_t kx022a_trigger_handler(int irq, void *p)
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if (ret < 0)
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goto err_read;
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iio_push_to_buffers_with_timestamp(idev, data->buffer, pf->timestamp);
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iio_push_to_buffers_with_timestamp(idev, data->buffer, data->timestamp);
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err_read:
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iio_trigger_notify_done(idev->trig);
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@ -253,7 +253,7 @@ static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
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.has_registers = true,
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.addr_shift = 4,
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.read_mask = BIT(3),
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.irq_flags = IRQF_TRIGGER_LOW,
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.irq_flags = IRQF_TRIGGER_FALLING,
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};
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static int ad7791_read_raw(struct iio_dev *indio_dev,
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@ -28,7 +28,6 @@ struct ltc2497_driverdata {
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struct ltc2497core_driverdata common_ddata;
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struct i2c_client *client;
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u32 recv_size;
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u32 sub_lsb;
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/*
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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@ -65,10 +64,10 @@ static int ltc2497_result_and_measure(struct ltc2497core_driverdata *ddata,
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* equivalent to a sign extension.
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*/
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if (st->recv_size == 3) {
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*val = (get_unaligned_be24(st->data.d8) >> st->sub_lsb)
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*val = (get_unaligned_be24(st->data.d8) >> 6)
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- BIT(ddata->chip_info->resolution + 1);
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} else {
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*val = (be32_to_cpu(st->data.d32) >> st->sub_lsb)
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*val = (be32_to_cpu(st->data.d32) >> 6)
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- BIT(ddata->chip_info->resolution + 1);
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}
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@ -122,7 +121,6 @@ static int ltc2497_probe(struct i2c_client *client)
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st->common_ddata.chip_info = chip_info;
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resolution = chip_info->resolution;
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st->sub_lsb = 31 - (resolution + 1);
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st->recv_size = BITS_TO_BYTES(resolution) + 1;
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return ltc2497core_probe(dev, indio_dev);
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@ -414,13 +414,17 @@ static int max11410_sample(struct max11410_state *st, int *sample_raw,
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if (!ret)
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return -ETIMEDOUT;
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} else {
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int ret2;
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/* Wait for status register Conversion Ready flag */
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ret = read_poll_timeout(max11410_read_reg, ret,
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ret || (val & MAX11410_STATUS_CONV_READY_BIT),
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ret = read_poll_timeout(max11410_read_reg, ret2,
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ret2 || (val & MAX11410_STATUS_CONV_READY_BIT),
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5000, MAX11410_CONVERSION_TIMEOUT_MS * 1000,
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true, st, MAX11410_REG_STATUS, &val);
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if (ret)
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return ret;
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if (ret2)
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return ret2;
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}
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/* Read ADC Data */
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@ -851,17 +855,21 @@ static int max11410_init_vref(struct device *dev,
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static int max11410_calibrate(struct max11410_state *st, u32 cal_type)
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{
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int ret, val;
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int ret, ret2, val;
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ret = max11410_write_reg(st, MAX11410_REG_CAL_START, cal_type);
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if (ret)
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return ret;
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/* Wait for status register Calibration Ready flag */
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return read_poll_timeout(max11410_read_reg, ret,
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ret || (val & MAX11410_STATUS_CAL_READY_BIT),
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ret = read_poll_timeout(max11410_read_reg, ret2,
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ret2 || (val & MAX11410_STATUS_CAL_READY_BIT),
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50000, MAX11410_CALIB_TIMEOUT_MS * 1000, true,
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st, MAX11410_REG_STATUS, &val);
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if (ret)
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return ret;
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return ret2;
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}
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static int max11410_self_calibrate(struct max11410_state *st)
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|
|
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@ -639,7 +639,7 @@ static int palmas_gpadc_probe(struct platform_device *pdev)
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static int palmas_gpadc_remove(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev = dev_to_iio_dev(&pdev->dev);
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struct iio_dev *indio_dev = dev_get_drvdata(&pdev->dev);
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struct palmas_gpadc *adc = iio_priv(indio_dev);
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if (adc->wakeup1_enable || adc->wakeup2_enable)
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|
|
|
@ -628,12 +628,20 @@ static int adc5_get_fw_channel_data(struct adc5_chip *adc,
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struct fwnode_handle *fwnode,
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const struct adc5_data *data)
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{
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const char *name = fwnode_get_name(fwnode), *channel_name;
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const char *channel_name;
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char *name;
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u32 chan, value, varr[2];
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u32 sid = 0;
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int ret;
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struct device *dev = adc->dev;
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name = devm_kasprintf(dev, GFP_KERNEL, "%pfwP", fwnode);
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if (!name)
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return -ENOMEM;
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|
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/* Cut the address part */
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name[strchrnul(name, '@') - name] = '\0';
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|
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ret = fwnode_property_read_u32(fwnode, "reg", &chan);
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if (ret) {
|
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dev_err(dev, "invalid channel number %s\n", name);
|
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|
|
|
@ -634,6 +634,7 @@ static int ti_ads7950_probe(struct spi_device *spi)
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st->chip.label = dev_name(&st->spi->dev);
|
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st->chip.parent = &st->spi->dev;
|
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st->chip.owner = THIS_MODULE;
|
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st->chip.can_sleep = true;
|
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st->chip.base = -1;
|
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st->chip.ngpio = TI_ADS7950_NUM_GPIOS;
|
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st->chip.get_direction = ti_ads7950_get_direction;
|
||||
|
|
|
@ -66,8 +66,8 @@ static int cio_dac_write_raw(struct iio_dev *indio_dev,
|
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if (mask != IIO_CHAN_INFO_RAW)
|
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return -EINVAL;
|
||||
|
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/* DAC can only accept up to a 16-bit value */
|
||||
if ((unsigned int)val > 65535)
|
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/* DAC can only accept up to a 12-bit value */
|
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if ((unsigned int)val > 4095)
|
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return -EINVAL;
|
||||
|
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priv->chan_out_states[chan->channel] = val;
|
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|
|
|
@ -47,6 +47,7 @@ config ADIS16480
|
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depends on SPI
|
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select IIO_ADIS_LIB
|
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select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
|
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select CRC32
|
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help
|
||||
Say yes here to build support for Analog Devices ADIS16375, ADIS16480,
|
||||
ADIS16485, ADIS16488 inertial sensors.
|
||||
|
|
|
@ -203,24 +203,27 @@ static ssize_t iio_buffer_write(struct file *filp, const char __user *buf,
|
|||
break;
|
||||
}
|
||||
|
||||
if (filp->f_flags & O_NONBLOCK) {
|
||||
if (!written)
|
||||
ret = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
|
||||
wait_woken(&wait, TASK_INTERRUPTIBLE,
|
||||
MAX_SCHEDULE_TIMEOUT);
|
||||
continue;
|
||||
}
|
||||
|
||||
ret = rb->access->write(rb, n - written, buf + written);
|
||||
if (ret == 0 && (filp->f_flags & O_NONBLOCK))
|
||||
ret = -EAGAIN;
|
||||
if (ret < 0)
|
||||
break;
|
||||
|
||||
if (ret > 0) {
|
||||
written += ret;
|
||||
if (written != n && !(filp->f_flags & O_NONBLOCK))
|
||||
continue;
|
||||
}
|
||||
} while (ret == 0);
|
||||
|
||||
} while (written != n);
|
||||
remove_wait_queue(&rb->pollq, &wait);
|
||||
|
||||
return ret < 0 ? ret : n;
|
||||
return ret < 0 ? ret : written;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -429,6 +429,14 @@ static const struct iio_info cm32181_info = {
|
|||
.attrs = &cm32181_attribute_group,
|
||||
};
|
||||
|
||||
static void cm32181_unregister_dummy_client(void *data)
|
||||
{
|
||||
struct i2c_client *client = data;
|
||||
|
||||
/* Unregister the dummy client */
|
||||
i2c_unregister_device(client);
|
||||
}
|
||||
|
||||
static int cm32181_probe(struct i2c_client *client)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
|
@ -460,6 +468,10 @@ static int cm32181_probe(struct i2c_client *client)
|
|||
client = i2c_acpi_new_device(dev, 1, &board_info);
|
||||
if (IS_ERR(client))
|
||||
return PTR_ERR(client);
|
||||
|
||||
ret = devm_add_action_or_reset(dev, cm32181_unregister_dummy_client, client);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
cm32181 = iio_priv(indio_dev);
|
||||
|
|
|
@ -208,7 +208,6 @@ static int vcnl4000_init(struct vcnl4000_data *data)
|
|||
|
||||
data->rev = ret & 0xf;
|
||||
data->al_scale = 250000;
|
||||
mutex_init(&data->vcnl4000_lock);
|
||||
|
||||
return data->chip_spec->set_power_state(data, true);
|
||||
};
|
||||
|
@ -1367,6 +1366,8 @@ static int vcnl4000_probe(struct i2c_client *client)
|
|||
data->id = id->driver_data;
|
||||
data->chip_spec = &vcnl4000_chip_spec_cfg[data->id];
|
||||
|
||||
mutex_init(&data->vcnl4000_lock);
|
||||
|
||||
ret = data->chip_spec->init(data);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
|
Loading…
Reference in a new issue