mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-18 08:35:03 +00:00
Code Issues Releases Wiki Activity

dt-bindings: Amlogic: add the documentation for the SECBUS2 registers

Browse source 
The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
contains registers for various IP blocks such as pin-controller bits for
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
The registers can be accessed directly when not running in "secure mode".
When "secure mode" is enabled then these registers have to be accessed
through secure monitor calls.

So far these SoCs are always known to boot in "non-secure mode".
Add a binding documentation using syscon (as these registers are shared
across different IPs) for the SECBUS2 registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210102205904.2691120-3-martin.blumenstingl@googlemail.com
This commit is contained in:
Martin Blumenstingl 2021-01-02 21:59:01 +01:00 committed by Kevin Hilman
parent 5d3f5d46de
commit 68f3a096d0
1 changed files with 42 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

42
Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml Normal file
View file

@ -0,0 +1,42 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
maintainers:
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
description: |
The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
contains registers for various IP blocks such as pin-controller bits for
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
The registers can be accessed directly when not running in "secure mode".
When "secure mode" is enabled then these registers have to be accessed
through secure monitor calls.
properties:
compatible:
items:
- enum:
- amlogic,meson8-secbus2
- amlogic,meson8b-secbus2
- const: syscon
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
secbus2: system-controller@4000 {
compatible = "amlogic,meson8-secbus2", "syscon";
reg = <0x4000 0x2000>;
};