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ARM: dts: Add clocks to DISP1 domain in exynos5250

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Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.

Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit is contained in:
Tomeu Vizoso 2015-10-15 12:31:24 +02:00 committed by Kukjin Kim
parent ae8a2881b5
commit 69636a85df
1 changed files with 4 additions and 0 deletions
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4
arch/arm/boot/dts/exynos5250.dtsi
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@ -130,6 +130,10 @@ pd_disp1: disp1-power-domain@100440A0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440A0 0x20>;
#power-domain-cells = <0>;
clocks = <&clock CLK_FIN_PLL>,
<&clock CLK_MOUT_ACLK200_DISP1_SUB>,
<&clock CLK_MOUT_ACLK300_DISP1_SUB>;
clock-names = "oscclk", "clk0", "clk1";
};
clock: clock-controller@10010000 {