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ARM: dts: Add clocks to DISP1 domain in exynos5250
Adds to the node of the DISP1 power domain the two clocks that need to be reparented while the domain is powered off: CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB. Otherwise the state is unknown at power up and the mixer's clocks are all messed up. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
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@ -130,6 +130,10 @@ pd_disp1: disp1-power-domain@100440A0 {
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compatible = "samsung,exynos4210-pd";
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compatible = "samsung,exynos4210-pd";
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reg = <0x100440A0 0x20>;
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reg = <0x100440A0 0x20>;
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#power-domain-cells = <0>;
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#power-domain-cells = <0>;
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clocks = <&clock CLK_FIN_PLL>,
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<&clock CLK_MOUT_ACLK200_DISP1_SUB>,
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<&clock CLK_MOUT_ACLK300_DISP1_SUB>;
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clock-names = "oscclk", "clk0", "clk1";
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};
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};
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clock: clock-controller@10010000 {
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clock: clock-controller@10010000 {
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