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wifi: ath11k: add new hw ops for IPQ5018 to get rx dest ring hashmap
The Destination ring control register is different for IPQ5018 when compared to IPQ8074/IPQ6018/QCN9074. Hence create a new hw ops to fetch the hash ring map for different device variants. ipq5018 hw ops is similar to qcn9074 except for this change, so reuse all the qcn9074 ops for ipq5018. Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1 Signed-off-by: Sriram R <quic_srirrama@quicinc.com> Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com> Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20221122132152.17771-8-quic_kathirve@quicinc.com
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1 changed files with 44 additions and 0 deletions
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@ -791,6 +791,49 @@ static void ath11k_hw_wcn6855_reo_setup(struct ath11k_base *ab)
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ring_hash_map);
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}
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static void ath11k_hw_ipq5018_reo_setup(struct ath11k_base *ab)
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{
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u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;
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u32 val;
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/* Each hash entry uses three bits to map to a particular ring. */
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u32 ring_hash_map = HAL_HASH_ROUTING_RING_SW1 << 0 |
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HAL_HASH_ROUTING_RING_SW2 << 4 |
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HAL_HASH_ROUTING_RING_SW3 << 8 |
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HAL_HASH_ROUTING_RING_SW4 << 12 |
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HAL_HASH_ROUTING_RING_SW1 << 16 |
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HAL_HASH_ROUTING_RING_SW2 << 20 |
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HAL_HASH_ROUTING_RING_SW3 << 24 |
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HAL_HASH_ROUTING_RING_SW4 << 28;
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val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);
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val &= ~HAL_REO1_GEN_ENABLE_FRAG_DST_RING;
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val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_FRAG_DST_RING,
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HAL_SRNG_RING_ID_REO2SW1) |
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FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |
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FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),
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HAL_DEFAULT_REO_TIMEOUT_USEC);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),
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HAL_DEFAULT_REO_TIMEOUT_USEC);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),
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HAL_DEFAULT_REO_TIMEOUT_USEC);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),
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HAL_DEFAULT_REO_TIMEOUT_USEC);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,
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ring_hash_map);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,
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ring_hash_map);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,
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ring_hash_map);
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ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,
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ring_hash_map);
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}
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static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
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{
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u16 peer_id = 0;
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@ -1117,6 +1160,7 @@ const struct ath11k_hw_ops ipq5018_ops = {
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.rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
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.rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
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.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
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.reo_setup = ath11k_hw_ipq5018_reo_setup,
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.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
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.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
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.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
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