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kvm: powerpc: book3s: Add is_hv_enabled to kvmppc_ops
This help us to identify whether we are running with hypervisor mode KVM enabled. The change is needed so that we can have both HV and PR kvm enabled in the same kernel. If both HV and PR KVM are included, interrupts come in to the HV version of the kvmppc_interrupt code, which then jumps to the PR handler, renamed to kvmppc_interrupt_pr, if the guest is a PR guest. Allowing both PR and HV in the same kernel required some changes to kvm_dev_ioctl_check_extension(), since the values returned now can't be selected with #ifdefs as much as previously. We look at is_hv_enabled to return the right value when checking for capabilities.For capabilities that are only provided by HV KVM, we return the HV value only if is_hv_enabled is true. For capabilities provided by PR KVM but not HV, we return the PR value only if is_hv_enabled is false. NOTE: in later patch we replace is_hv_enabled with a static inline function comparing kvm_ppc_ops Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
parent
dd96b2c2dc
commit
699cc87641
7 changed files with 79 additions and 81 deletions
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@ -301,59 +301,6 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
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return vcpu->arch.fault_dar;
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}
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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return to_book3s(vcpu)->hior;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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if (pending_now)
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vcpu->arch.shared->int_pending = 1;
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else if (old_pending)
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vcpu->arch.shared->int_pending = 0;
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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ulong crit_raw = vcpu->arch.shared->critical;
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ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
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bool crit;
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/* Truncate crit indicators in 32 bit mode */
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if (!(vcpu->arch.shared->msr & MSR_SF)) {
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crit_raw &= 0xffffffff;
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crit_r1 &= 0xffffffff;
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}
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/* Critical section when crit == r1 */
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crit = (crit_raw == crit_r1);
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/* ... and we're in supervisor mode */
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crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
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return crit;
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}
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#else /* CONFIG_KVM_BOOK3S_PR_POSSIBLE */
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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return 0;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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return false;
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}
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#endif
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/* Magic register values loaded into r3 and r4 before the 'sc' assembly
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* instruction for the OSI hypercalls */
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#define OSI_SC_MAGIC_R3 0x113724FA
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@ -180,6 +180,7 @@ union kvmppc_one_reg {
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};
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struct kvmppc_ops {
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bool is_hv_enabled;
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int (*get_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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int (*set_sregs)(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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int (*get_one_reg)(struct kvm_vcpu *vcpu, u64 id,
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@ -309,10 +310,10 @@ static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
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static inline u32 kvmppc_get_xics_latch(void)
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{
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u32 xirr = get_paca()->kvm_hstate.saved_xirr;
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u32 xirr;
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xirr = get_paca()->kvm_hstate.saved_xirr;
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get_paca()->kvm_hstate.saved_xirr = 0;
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return xirr;
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}
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@ -69,6 +69,50 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
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{
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}
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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if (!kvmppc_ops->is_hv_enabled)
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return to_book3s(vcpu)->hior;
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return 0;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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if (kvmppc_ops->is_hv_enabled)
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return;
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if (pending_now)
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vcpu->arch.shared->int_pending = 1;
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else if (old_pending)
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vcpu->arch.shared->int_pending = 0;
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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ulong crit_raw;
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ulong crit_r1;
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bool crit;
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if (kvmppc_ops->is_hv_enabled)
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return false;
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crit_raw = vcpu->arch.shared->critical;
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crit_r1 = kvmppc_get_gpr(vcpu, 1);
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/* Truncate crit indicators in 32 bit mode */
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if (!(vcpu->arch.shared->msr & MSR_SF)) {
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crit_raw &= 0xffffffff;
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crit_r1 &= 0xffffffff;
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}
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/* Critical section when crit == r1 */
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crit = (crit_raw == crit_r1);
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/* ... and we're in supervisor mode */
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crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
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return crit;
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}
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void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
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{
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vcpu->arch.shared->srr0 = kvmppc_get_pc(vcpu);
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@ -2159,6 +2159,7 @@ static long kvm_arch_vm_ioctl_hv(struct file *filp,
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}
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static struct kvmppc_ops kvmppc_hv_ops = {
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.is_hv_enabled = true,
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.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
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.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
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.get_one_reg = kvmppc_get_one_reg_hv,
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@ -1523,6 +1523,7 @@ static long kvm_arch_vm_ioctl_pr(struct file *filp,
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}
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static struct kvmppc_ops kvmppc_pr_ops = {
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.is_hv_enabled = false,
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.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
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.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
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.get_one_reg = kvmppc_get_one_reg_pr,
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@ -818,7 +818,7 @@ int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
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}
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/* Check for real mode returning too hard */
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if (xics->real_mode)
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if (xics->real_mode && kvmppc_ops->is_hv_enabled)
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return kvmppc_xics_rm_complete(vcpu, req);
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switch (req) {
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@ -52,7 +52,6 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
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return 1;
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}
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#ifndef CONFIG_KVM_BOOK3S_64_HV
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/*
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* Common checks before entering the guest world. Call with interrupts
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* disabled.
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@ -127,7 +126,6 @@ int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)
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return r;
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}
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#endif /* CONFIG_KVM_BOOK3S_64_HV */
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int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
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{
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@ -194,11 +192,9 @@ int kvmppc_sanity_check(struct kvm_vcpu *vcpu)
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if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled)
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goto out;
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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/* HV KVM can only do PAPR mode for now */
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if (!vcpu->arch.papr_enabled)
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if (!vcpu->arch.papr_enabled && kvmppc_ops->is_hv_enabled)
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goto out;
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#endif
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#ifdef CONFIG_KVM_BOOKE_HV
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if (!cpu_has_feature(CPU_FTR_EMB_HV))
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@ -322,22 +318,26 @@ int kvm_dev_ioctl_check_extension(long ext)
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case KVM_CAP_DEVICE_CTRL:
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r = 1;
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break;
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#ifndef CONFIG_KVM_BOOK3S_64_HV
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case KVM_CAP_PPC_PAIRED_SINGLES:
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case KVM_CAP_PPC_OSI:
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case KVM_CAP_PPC_GET_PVINFO:
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#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
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case KVM_CAP_SW_TLB:
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#endif
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#ifdef CONFIG_KVM_MPIC
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case KVM_CAP_IRQ_MPIC:
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#endif
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r = 1;
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/* We support this only for PR */
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r = !kvmppc_ops->is_hv_enabled;
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break;
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#ifdef CONFIG_KVM_MMIO
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case KVM_CAP_COALESCED_MMIO:
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r = KVM_COALESCED_MMIO_PAGE_OFFSET;
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break;
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#endif
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#ifdef CONFIG_KVM_MPIC
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case KVM_CAP_IRQ_MPIC:
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r = 1;
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break;
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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case KVM_CAP_SPAPR_TCE:
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case KVM_CAP_PPC_ALLOC_HTAB:
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r = 1;
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break;
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#endif /* CONFIG_PPC_BOOK3S_64 */
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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case KVM_CAP_PPC_SMT:
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r = threads_per_core;
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if (kvmppc_ops->is_hv_enabled)
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r = threads_per_core;
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else
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r = 0;
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break;
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case KVM_CAP_PPC_RMA:
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r = 1;
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r = kvmppc_ops->is_hv_enabled;
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/* PPC970 requires an RMA */
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if (cpu_has_feature(CPU_FTR_ARCH_201))
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if (r && cpu_has_feature(CPU_FTR_ARCH_201))
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r = 2;
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break;
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#endif
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case KVM_CAP_SYNC_MMU:
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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r = cpu_has_feature(CPU_FTR_ARCH_206) ? 1 : 0;
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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if (kvmppc_ops->is_hv_enabled)
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r = cpu_has_feature(CPU_FTR_ARCH_206) ? 1 : 0;
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else
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r = 0;
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#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
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r = 1;
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#else
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r = 0;
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break;
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#endif
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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break;
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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case KVM_CAP_PPC_HTAB_FD:
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r = 1;
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r = kvmppc_ops->is_hv_enabled;
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break;
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#endif
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break;
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case KVM_CAP_NR_VCPUS:
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/*
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* Recommending a number of CPUs is somewhat arbitrary; we
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* will have secondary threads "offline"), and for other KVM
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* implementations just count online CPUs.
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*/
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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r = num_present_cpus();
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#else
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r = num_online_cpus();
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#endif
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if (kvmppc_ops->is_hv_enabled)
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r = num_present_cpus();
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else
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r = num_online_cpus();
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break;
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case KVM_CAP_MAX_VCPUS:
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r = KVM_MAX_VCPUS;
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