arm64: dts: renesas: r8a779a0: Fix PMU interrupt

[ Upstream commit bbbf6db5a0 ]

Should use PPI No.7 for the PMU. Otherwise, the perf command didn't
show any information.

Fixes: 834c310f54 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210325041949.925777-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Yoshihiro Shimoda 2021-03-25 13:19:49 +09:00 committed by Greg Kroah-Hartman
parent 7b6552719c
commit 6a4d2f863a

View file

@ -50,10 +50,7 @@ extalr_clk: extalr {
pmu_a76 {
compatible = "arm,cortex-a76-pmu";
interrupts-extended = <&gic GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
/* External SCIF clock - to be overridden by boards that provide it */