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s390/bpf: Wrap JIT macro parameter usages in parentheses
This change does not alter JIT behavior; it only makes it possible to safely invoke JIT macros with complex arguments in the future. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20191107113211.90105-1-iii@linux.ibm.com
This commit is contained in:
Ilya Leoshkevich
Daniel Borkmann
parent
166f11d11f
commit
6ad2e1a007
1 changed files with 31 additions and 31 deletions
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@ -132,13 +132,13 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define _EMIT2(op) \
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({ \
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if (jit->prg_buf) \
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*(u16 *) (jit->prg_buf + jit->prg) = op; \
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*(u16 *) (jit->prg_buf + jit->prg) = (op); \
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jit->prg += 2; \
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})
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#define EMIT2(op, b1, b2) \
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({ \
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_EMIT2(op | reg(b1, b2)); \
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_EMIT2((op) | reg(b1, b2)); \
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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})
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@ -146,20 +146,20 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define _EMIT4(op) \
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({ \
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if (jit->prg_buf) \
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*(u32 *) (jit->prg_buf + jit->prg) = op; \
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*(u32 *) (jit->prg_buf + jit->prg) = (op); \
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jit->prg += 4; \
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})
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#define EMIT4(op, b1, b2) \
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({ \
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_EMIT4(op | reg(b1, b2)); \
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_EMIT4((op) | reg(b1, b2)); \
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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})
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#define EMIT4_RRF(op, b1, b2, b3) \
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({ \
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_EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
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_EMIT4((op) | reg_high(b3) << 8 | reg(b1, b2)); \
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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REG_SET_SEEN(b3); \
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@ -168,13 +168,13 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define _EMIT4_DISP(op, disp) \
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({ \
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unsigned int __disp = (disp) & 0xfff; \
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_EMIT4(op | __disp); \
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_EMIT4((op) | __disp); \
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})
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#define EMIT4_DISP(op, b1, b2, disp) \
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({ \
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_EMIT4_DISP(op | reg_high(b1) << 16 | \
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reg_high(b2) << 8, disp); \
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_EMIT4_DISP((op) | reg_high(b1) << 16 | \
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reg_high(b2) << 8, (disp)); \
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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})
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@ -182,21 +182,21 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define EMIT4_IMM(op, b1, imm) \
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({ \
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unsigned int __imm = (imm) & 0xffff; \
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_EMIT4(op | reg_high(b1) << 16 | __imm); \
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_EMIT4((op) | reg_high(b1) << 16 | __imm); \
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REG_SET_SEEN(b1); \
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})
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#define EMIT4_PCREL(op, pcrel) \
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({ \
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long __pcrel = ((pcrel) >> 1) & 0xffff; \
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_EMIT4(op | __pcrel); \
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_EMIT4((op) | __pcrel); \
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})
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#define _EMIT6(op1, op2) \
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({ \
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if (jit->prg_buf) { \
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*(u32 *) (jit->prg_buf + jit->prg) = op1; \
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*(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
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*(u32 *) (jit->prg_buf + jit->prg) = (op1); \
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*(u16 *) (jit->prg_buf + jit->prg + 4) = (op2); \
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} \
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jit->prg += 6; \
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})
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@ -204,20 +204,20 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define _EMIT6_DISP(op1, op2, disp) \
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({ \
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unsigned int __disp = (disp) & 0xfff; \
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_EMIT6(op1 | __disp, op2); \
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_EMIT6((op1) | __disp, op2); \
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})
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#define _EMIT6_DISP_LH(op1, op2, disp) \
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({ \
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u32 _disp = (u32) disp; \
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u32 _disp = (u32) (disp); \
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unsigned int __disp_h = _disp & 0xff000; \
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unsigned int __disp_l = _disp & 0x00fff; \
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_EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
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_EMIT6((op1) | __disp_l, (op2) | __disp_h >> 4); \
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})
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#define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
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({ \
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_EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
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_EMIT6_DISP_LH((op1) | reg(b1, b2) << 16 | \
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reg_high(b3) << 8, op2, disp); \
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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@ -227,8 +227,8 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \
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({ \
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int rel = (jit->labels[label] - jit->prg) >> 1; \
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_EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \
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op2 | mask << 12); \
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_EMIT6((op1) | reg(b1, b2) << 16 | (rel & 0xffff), \
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(op2) | (mask) << 12); \
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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})
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@ -236,43 +236,43 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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#define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \
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({ \
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int rel = (jit->labels[label] - jit->prg) >> 1; \
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_EMIT6(op1 | (reg_high(b1) | mask) << 16 | \
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(rel & 0xffff), op2 | (imm & 0xff) << 8); \
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_EMIT6((op1) | (reg_high(b1) | (mask)) << 16 | \
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(rel & 0xffff), (op2) | ((imm) & 0xff) << 8); \
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REG_SET_SEEN(b1); \
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BUILD_BUG_ON(((unsigned long) imm) > 0xff); \
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BUILD_BUG_ON(((unsigned long) (imm)) > 0xff); \
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})
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#define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
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({ \
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/* Branch instruction needs 6 bytes */ \
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int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
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_EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \
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int rel = (addrs[(i) + (off) + 1] - (addrs[(i) + 1] - 6)) / 2;\
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_EMIT6((op1) | reg(b1, b2) << 16 | (rel & 0xffff), (op2) | (mask));\
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REG_SET_SEEN(b1); \
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REG_SET_SEEN(b2); \
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})
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#define EMIT6_PCREL_RILB(op, b, target) \
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({ \
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int rel = (target - jit->prg) / 2; \
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_EMIT6(op | reg_high(b) << 16 | rel >> 16, rel & 0xffff); \
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int rel = ((target) - jit->prg) / 2; \
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_EMIT6((op) | reg_high(b) << 16 | rel >> 16, rel & 0xffff);\
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REG_SET_SEEN(b); \
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})
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#define EMIT6_PCREL_RIL(op, target) \
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({ \
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int rel = (target - jit->prg) / 2; \
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_EMIT6(op | rel >> 16, rel & 0xffff); \
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int rel = ((target) - jit->prg) / 2; \
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_EMIT6((op) | rel >> 16, rel & 0xffff); \
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})
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#define _EMIT6_IMM(op, imm) \
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({ \
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unsigned int __imm = (imm); \
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_EMIT6(op | (__imm >> 16), __imm & 0xffff); \
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_EMIT6((op) | (__imm >> 16), __imm & 0xffff); \
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})
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#define EMIT6_IMM(op, b1, imm) \
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({ \
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_EMIT6_IMM(op | reg_high(b1) << 16, imm); \
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_EMIT6_IMM((op) | reg_high(b1) << 16, imm); \
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REG_SET_SEEN(b1); \
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})
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@ -282,7 +282,7 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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ret = jit->lit - jit->base_ip; \
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jit->seen |= SEEN_LITERAL; \
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if (jit->prg_buf) \
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*(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
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*(u32 *) (jit->prg_buf + jit->lit) = (u32) (val);\
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jit->lit += 4; \
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ret; \
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})
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@ -293,7 +293,7 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
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ret = jit->lit - jit->base_ip; \
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jit->seen |= SEEN_LITERAL; \
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if (jit->prg_buf) \
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*(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
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*(u64 *) (jit->prg_buf + jit->lit) = (u64) (val);\
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jit->lit += 8; \
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ret; \
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})
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