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dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC

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Add endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP
used in J7200, however AM64 is a non-coherent architecture.

Link: https://lore.kernel.org/r/20210308063550.6227-4-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Kishon Vijay Abraham I 2021-03-08 12:05:49 +05:30 committed by Lorenzo Pieralisi
parent 3201f355e9
commit 6b7d5394c2
1 changed files with 5 additions and 4 deletions
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9
Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
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@ -16,13 +16,15 @@ allOf:
properties:
compatible:
oneOf:
- const: ti,j721e-pcie-ep
- description: PCIe EP controller in AM64
items:
- const: ti,am64-pcie-ep
- const: ti,j721e-pcie-ep
- description: PCIe EP controller in J7200
items:
- const: ti,j7200-pcie-ep
- const: ti,j721e-pcie-ep
- description: PCIe EP controller in J721E
items:
- const: ti,j721e-pcie-ep
reg:
maxItems: 4
@ -66,7 +68,6 @@ required:
- power-domains
- clocks
- clock-names
- dma-coherent
- max-functions
- phys
- phy-names