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crypto: mxs-dcp - Fix AES issues
[ Upstream commit fadd7a6e61
]
The DCP driver does not obey cryptlen, when doing android CTS this
results in passing to hardware input stream lengths which are not
multiple of block size.
Add a check to prevent future erroneous stream lengths from reaching the
hardware and adjust the scatterlist walking code to obey cryptlen.
Also properly copy-out the IV for chaining.
Signed-off-by: Radu Solea <radu.solea@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
70ecd0459d
commit
6b9c4eddb3
1 changed files with 31 additions and 2 deletions
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@ -225,6 +225,12 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,
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dma_addr_t dst_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_out_buf,
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dma_addr_t dst_phys = dma_map_single(sdcp->dev, sdcp->coh->aes_out_buf,
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DCP_BUF_SZ, DMA_FROM_DEVICE);
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DCP_BUF_SZ, DMA_FROM_DEVICE);
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if (actx->fill % AES_BLOCK_SIZE) {
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dev_err(sdcp->dev, "Invalid block size!\n");
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ret = -EINVAL;
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goto aes_done_run;
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}
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/* Fill in the DMA descriptor. */
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/* Fill in the DMA descriptor. */
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desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE |
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desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE |
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MXS_DCP_CONTROL0_INTERRUPT |
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MXS_DCP_CONTROL0_INTERRUPT |
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@ -254,6 +260,7 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx,
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ret = mxs_dcp_start_dma(actx);
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ret = mxs_dcp_start_dma(actx);
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aes_done_run:
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dma_unmap_single(sdcp->dev, key_phys, 2 * AES_KEYSIZE_128,
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dma_unmap_single(sdcp->dev, key_phys, 2 * AES_KEYSIZE_128,
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DMA_TO_DEVICE);
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DMA_TO_DEVICE);
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dma_unmap_single(sdcp->dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE);
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dma_unmap_single(sdcp->dev, src_phys, DCP_BUF_SZ, DMA_TO_DEVICE);
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@ -280,13 +287,15 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
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uint8_t *out_tmp, *src_buf, *dst_buf = NULL;
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uint8_t *out_tmp, *src_buf, *dst_buf = NULL;
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uint32_t dst_off = 0;
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uint32_t dst_off = 0;
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uint32_t last_out_len = 0;
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uint8_t *key = sdcp->coh->aes_key;
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uint8_t *key = sdcp->coh->aes_key;
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int ret = 0;
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int ret = 0;
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int split = 0;
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int split = 0;
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unsigned int i, len, clen, rem = 0;
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unsigned int i, len, clen, rem = 0, tlen = 0;
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int init = 0;
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int init = 0;
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bool limit_hit = false;
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actx->fill = 0;
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actx->fill = 0;
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@ -305,6 +314,11 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
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for_each_sg(req->src, src, nents, i) {
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for_each_sg(req->src, src, nents, i) {
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src_buf = sg_virt(src);
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src_buf = sg_virt(src);
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len = sg_dma_len(src);
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len = sg_dma_len(src);
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tlen += len;
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limit_hit = tlen > req->nbytes;
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if (limit_hit)
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len = req->nbytes - (tlen - len);
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do {
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do {
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if (actx->fill + len > out_off)
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if (actx->fill + len > out_off)
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@ -321,13 +335,15 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
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* If we filled the buffer or this is the last SG,
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* If we filled the buffer or this is the last SG,
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* submit the buffer.
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* submit the buffer.
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*/
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*/
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if (actx->fill == out_off || sg_is_last(src)) {
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if (actx->fill == out_off || sg_is_last(src) ||
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limit_hit) {
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ret = mxs_dcp_run_aes(actx, req, init);
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ret = mxs_dcp_run_aes(actx, req, init);
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if (ret)
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if (ret)
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return ret;
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return ret;
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init = 0;
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init = 0;
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out_tmp = out_buf;
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out_tmp = out_buf;
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last_out_len = actx->fill;
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while (dst && actx->fill) {
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while (dst && actx->fill) {
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if (!split) {
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if (!split) {
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dst_buf = sg_virt(dst);
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dst_buf = sg_virt(dst);
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@ -350,6 +366,19 @@ static int mxs_dcp_aes_block_crypt(struct crypto_async_request *arq)
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}
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}
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}
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}
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} while (len);
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} while (len);
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if (limit_hit)
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break;
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}
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/* Copy the IV for CBC for chaining */
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if (!rctx->ecb) {
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if (rctx->enc)
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memcpy(req->info, out_buf+(last_out_len-AES_BLOCK_SIZE),
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AES_BLOCK_SIZE);
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else
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memcpy(req->info, in_buf+(last_out_len-AES_BLOCK_SIZE),
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AES_BLOCK_SIZE);
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}
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}
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return ret;
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return ret;
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