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drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3)

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The GOP sometimes initializes the pclk at a (slightly) different frequency
then the pclk which we've calculated.

This commit makes the DSI code read-back the pclk set by the GOP and
if that is within a reasonable margin of the calculated pclk, uses
that instead.

This fixes the first modeset being a full modeset instead of a
fast modeset on systems where the GOP pclk is different.

Changes in v2:
-Use intel_encoder_current_mode() to get the pclk setup by the GOP

Changes in v3:
-Back to the readback approach, skipping the dsi_pll.ctrl / .dev checks
 in intel_pipe_config_compare() when adjust is set leads to:
 [drm:pipe_config_err [i915]] *ERROR* mismatch in dsi_pll.ctrl (...)
 [drm:pipe_config_err [i915]] *ERROR* mismatch in dsi_pll.div (...)
-Do the readback and pclk overriding from vlv_dsi_init(), rather then from
 intel_dsi_vbt_init() as the vbt code should not be touching the hw

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190605181735.7020-3-hdegoede@redhat.com
This commit is contained in:
Hans de Goede 2019-06-05 20:17:35 +02:00
parent 2def5ae7d7
commit 6be306bee7
1 changed files with 18 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

22
drivers/gpu/drm/i915/vlv_dsi.c
View file

@ -1845,7 +1845,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
struct drm_encoder *encoder;
struct intel_connector *intel_connector;
struct drm_connector *connector;
struct drm_display_mode *fixed_mode;
struct drm_display_mode *current_mode, *fixed_mode;
enum port port;
DRM_DEBUG_KMS("\n");
@ -1889,6 +1889,9 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
intel_connector->get_hw_state = intel_connector_get_hw_state;
intel_encoder->port = port;
intel_encoder->type = INTEL_OUTPUT_DSI;
intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI;
intel_encoder->cloneable = 0;
/*
* On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI
@ -1926,6 +1929,20 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
goto err;
}
/* Use clock read-back from current hw-state for fastboot */
current_mode = intel_encoder_current_mode(intel_encoder);
if (current_mode) {
DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n",
intel_dsi->pclk, current_mode->clock);
if (intel_fuzzy_clock_check(intel_dsi->pclk,
current_mode->clock)) {
DRM_DEBUG_KMS("Using GOP pclk\n");
intel_dsi->pclk = current_mode->clock;
}
kfree(current_mode);
}
vlv_dphy_param_init(intel_dsi);
/*
@ -1943,9 +1960,6 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
}
}
intel_encoder->type = INTEL_OUTPUT_DSI;
intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI;
intel_encoder->cloneable = 0;
drm_connector_init(dev, connector, &intel_dsi_connector_funcs,
DRM_MODE_CONNECTOR_DSI);