This branch contains changes needed to make omap2+

work properly with sparse IRQ. It also removes
 dependencies to mach/hardware.h. These help moving
 things towards ARM single zImage support.
 
 This branch is based on a commit in tty-next
 branch with omap-devel-gpmc-fixed-for-v3.7 and
 cleanup-omap-tags-for-v3.7 merged in to keep things
 compiling and sort out some merge conflicts.
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Merge tag 'omap-cleanup-sparseirq-for-v3.7' into devel-dt

This branch contains changes needed to make omap2+
work properly with sparse IRQ. It also removes
dependencies to mach/hardware.h. These help moving
things towards ARM single zImage support.

This branch is based on a commit in tty-next
branch with omap-devel-gpmc-fixed-for-v3.7 and
cleanup-omap-tags-for-v3.7 merged in to keep things
compiling and sort out some merge conflicts.

Conflicts:
	arch/arm/mach-omap2/omap4-common.c
	drivers/gpio/gpio-twl4030.c
This commit is contained in:
Tony Lindgren 2012-09-16 15:35:06 -07:00
commit 6bfc82ff58
727 changed files with 10654 additions and 12672 deletions

View File

@ -210,3 +210,15 @@ Users:
firmware assigned instance number of the PCI
device that can help in understanding the firmware
intended order of the PCI device.
What: /sys/bus/pci/devices/.../d3cold_allowed
Date: July 2012
Contact: Huang Ying <ying.huang@intel.com>
Description:
d3cold_allowed is bit to control whether the corresponding PCI
device can be put into D3Cold state. If it is cleared, the
device will never be put into D3Cold state. If it is set, the
device may be put into D3Cold state if other requirements are
satisfied too. Reading this attribute will show the current
value of d3cold_allowed bit. Writing this attribute will set
the value of d3cold_allowed bit.

View File

@ -17,3 +17,12 @@ Description:
device, like 'tty1'.
The file supports poll() to detect virtual
console switches.
What: /sys/class/tty/ttyS0/uartclk
Date: Sep 2012
Contact: Tomas Hlavacek <tmshlvck@gmail.com>
Description:
Shows the current uartclk value associated with the
UART port in serial_core, that is bound to TTY like ttyS0.
uartclk = 16 * baud_base

View File

@ -3,15 +3,21 @@
biodoc.txt
- Notes on the Generic Block Layer Rewrite in Linux 2.5
capability.txt
- Generic Block Device Capability (/sys/block/<disk>/capability)
- Generic Block Device Capability (/sys/block/<device>/capability)
cfq-iosched.txt
- CFQ IO scheduler tunables
data-integrity.txt
- Block data integrity
deadline-iosched.txt
- Deadline IO scheduler tunables
ioprio.txt
- Block io priorities (in CFQ scheduler)
queue-sysfs.txt
- Queue's sysfs entries
request.txt
- The members of struct request (in include/linux/blkdev.h)
stat.txt
- Block layer statistics in /sys/block/<dev>/stat
- Block layer statistics in /sys/block/<device>/stat
switching-sched.txt
- Switching I/O schedulers at runtime
writeback_cache_control.txt

View File

@ -1,3 +1,14 @@
CFQ (Complete Fairness Queueing)
===============================
The main aim of CFQ scheduler is to provide a fair allocation of the disk
I/O bandwidth for all the processes which requests an I/O operation.
CFQ maintains the per process queue for the processes which request I/O
operation(syncronous requests). In case of asynchronous requests, all the
requests from all the processes are batched together according to their
process's I/O priority.
CFQ ioscheduler tunables
========================
@ -25,6 +36,72 @@ there are multiple spindles behind single LUN (Host based hardware RAID
controller or for storage arrays), setting slice_idle=0 might end up in better
throughput and acceptable latencies.
back_seek_max
-------------
This specifies, given in Kbytes, the maximum "distance" for backward seeking.
The distance is the amount of space from the current head location to the
sectors that are backward in terms of distance.
This parameter allows the scheduler to anticipate requests in the "backward"
direction and consider them as being the "next" if they are within this
distance from the current head location.
back_seek_penalty
-----------------
This parameter is used to compute the cost of backward seeking. If the
backward distance of request is just 1/back_seek_penalty from a "front"
request, then the seeking cost of two requests is considered equivalent.
So scheduler will not bias toward one or the other request (otherwise scheduler
will bias toward front request). Default value of back_seek_penalty is 2.
fifo_expire_async
-----------------
This parameter is used to set the timeout of asynchronous requests. Default
value of this is 248ms.
fifo_expire_sync
----------------
This parameter is used to set the timeout of synchronous requests. Default
value of this is 124ms. In case to favor synchronous requests over asynchronous
one, this value should be decreased relative to fifo_expire_async.
slice_async
-----------
This parameter is same as of slice_sync but for asynchronous queue. The
default value is 40ms.
slice_async_rq
--------------
This parameter is used to limit the dispatching of asynchronous request to
device request queue in queue's slice time. The maximum number of request that
are allowed to be dispatched also depends upon the io priority. Default value
for this is 2.
slice_sync
----------
When a queue is selected for execution, the queues IO requests are only
executed for a certain amount of time(time_slice) before switching to another
queue. This parameter is used to calculate the time slice of synchronous
queue.
time_slice is computed using the below equation:-
time_slice = slice_sync + (slice_sync/5 * (4 - prio)). To increase the
time_slice of synchronous queue, increase the value of slice_sync. Default
value is 100ms.
quantum
-------
This specifies the number of request dispatched to the device queue. In a
queue's time slice, a request will not be dispatched if the number of request
in the device exceeds this parameter. This parameter is used for synchronous
request.
In case of storage with several disk, this setting can limit the parallel
processing of request. Therefore, increasing the value can imporve the
performace although this can cause the latency of some I/O to increase due
to more number of requests.
CFQ IOPS Mode for group scheduling
===================================
Basic CFQ design is to provide priority based time slices. Higher priority

View File

@ -9,20 +9,71 @@ These files are the ones found in the /sys/block/xxx/queue/ directory.
Files denoted with a RO postfix are readonly and the RW postfix means
read-write.
add_random (RW)
----------------
This file allows to trun off the disk entropy contribution. Default
value of this file is '1'(on).
discard_granularity (RO)
-----------------------
This shows the size of internal allocation of the device in bytes, if
reported by the device. A value of '0' means device does not support
the discard functionality.
discard_max_bytes (RO)
----------------------
Devices that support discard functionality may have internal limits on
the number of bytes that can be trimmed or unmapped in a single operation.
The discard_max_bytes parameter is set by the device driver to the maximum
number of bytes that can be discarded in a single operation. Discard
requests issued to the device must not exceed this limit. A discard_max_bytes
value of 0 means that the device does not support discard functionality.
discard_zeroes_data (RO)
------------------------
When read, this file will show if the discarded block are zeroed by the
device or not. If its value is '1' the blocks are zeroed otherwise not.
hw_sector_size (RO)
-------------------
This is the hardware sector size of the device, in bytes.
iostats (RW)
-------------
This file is used to control (on/off) the iostats accounting of the
disk.
logical_block_size (RO)
-----------------------
This is the logcal block size of the device, in bytes.
max_hw_sectors_kb (RO)
----------------------
This is the maximum number of kilobytes supported in a single data transfer.
max_integrity_segments (RO)
---------------------------
When read, this file shows the max limit of integrity segments as
set by block layer which a hardware controller can handle.
max_sectors_kb (RW)
-------------------
This is the maximum number of kilobytes that the block layer will allow
for a filesystem request. Must be smaller than or equal to the maximum
size allowed by the hardware.
max_segments (RO)
-----------------
Maximum number of segments of the device.
max_segment_size (RO)
---------------------
Maximum segment size of the device.
minimum_io_size (RO)
--------------------
This is the smallest preferred io size reported by the device.
nomerges (RW)
-------------
This enables the user to disable the lookup logic involved with IO
@ -45,11 +96,24 @@ per-block-cgroup request pool. IOW, if there are N block cgroups,
each request queue may have upto N request pools, each independently
regulated by nr_requests.
optimal_io_size (RO)
--------------------
This is the optimal io size reported by the device.
physical_block_size (RO)
------------------------
This is the physical block size of device, in bytes.
read_ahead_kb (RW)
------------------
Maximum number of kilobytes to read-ahead for filesystems on this block
device.
rotational (RW)
---------------
This file is used to stat if the device is of rotational type or
non-rotational type.
rq_affinity (RW)
----------------
If this option is '1', the block layer will migrate request completions to the

View File

@ -10,8 +10,8 @@ Required properties:
- compatible : Should be "fsl,<chip>-esdhc"
Optional properties:
- fsl,cd-internal : Indicate to use controller internal card detection
- fsl,wp-internal : Indicate to use controller internal write protection
- fsl,cd-controller : Indicate to use controller internal card detection
- fsl,wp-controller : Indicate to use controller internal write protection
Examples:
@ -19,8 +19,8 @@ esdhc@70004000 {
compatible = "fsl,imx51-esdhc";
reg = <0x70004000 0x4000>;
interrupts = <1>;
fsl,cd-internal;
fsl,wp-internal;
fsl,cd-controller;
fsl,wp-controller;
};
esdhc@70008000 {

View File

@ -0,0 +1,14 @@
* NXP LPC32xx SoC High Speed UART
Required properties:
- compatible: Should be "nxp,lpc3220-hsuart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
Example:
uart1: serial@40014000 {
compatible = "nxp,lpc3220-hsuart";
reg = <0x40014000 0x1000>;
interrupts = <26 0>;
};

View File

@ -25,6 +25,8 @@ Optional properties:
accesses to the UART (e.g. TI davinci).
- used-by-rtas : set to indicate that the port is in use by the OpenFirmware
RTAS and should not be registered.
- no-loopback-test: set to indicate that the port does not implements loopback
test mode
Example:

View File

@ -579,7 +579,7 @@ Why: KVM tracepoints provide mostly equivalent information in a much more
----------------------------
What: at91-mci driver ("CONFIG_MMC_AT91")
When: 3.7
When: 3.8
Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support
was added to atmel-mci as a first step to support more chips.
Then at91-mci was kept only for old IP versions (on at91rm9200 and

View File

@ -2,8 +2,6 @@
- this file.
README.cycladesZ
- info on Cyclades-Z firmware loading.
computone.txt
- info on Computone Intelliport II/Plus Multiport Serial Driver.
digiepca.txt
- info on Digi Intl. {PC,PCI,EISA}Xx and Xem series cards.
hayes-esp.txt

View File

@ -1,520 +0,0 @@
NOTE: This is an unmaintained driver. It is not guaranteed to work due to
changes made in the tty layer in 2.6. If you wish to take over maintenance of
this driver, contact Michael Warfield <mhw@wittsend.com>.
Changelog:
----------
11-01-2001: Original Document
10-29-2004: Minor misspelling & format fix, update status of driver.
James Nelson <james4765@gmail.com>
Computone Intelliport II/Plus Multiport Serial Driver
-----------------------------------------------------
Release Notes For Linux Kernel 2.2 and higher.
These notes are for the drivers which have already been integrated into the
kernel and have been tested on Linux kernels 2.0, 2.2, 2.3, and 2.4.
Version: 1.2.14
Date: 11/01/2001
Historical Author: Andrew Manison <amanison@america.net>
Primary Author: Doug McNash
This file assumes that you are using the Computone drivers which are
integrated into the kernel sources. For updating the drivers or installing
drivers into kernels which do not already have Computone drivers, please
refer to the instructions in the README.computone file in the driver patch.
1. INTRODUCTION
This driver supports the entire family of Intelliport II/Plus controllers
with the exception of the MicroChannel controllers. It does not support
products previous to the Intelliport II.
This driver was developed on the v2.0.x Linux tree and has been tested up
to v2.4.14; it will probably not work with earlier v1.X kernels,.
2. QUICK INSTALLATION
Hardware - If you have an ISA card, find a free interrupt and io port.
List those in use with `cat /proc/interrupts` and
`cat /proc/ioports`. Set the card dip switches to a free
address. You may need to configure your BIOS to reserve an
irq for an ISA card. PCI and EISA parameters are set
automagically. Insert card into computer with the power off
before or after drivers installation.
Note the hardware address from the Computone ISA cards installed into
the system. These are required for editing ip2.c or editing
/etc/modprobe.d/*.conf, or for specification on the modprobe
command line.
Note that the /etc/modules.conf should be used for older (pre-2.6)
kernels.
Software -
Module installation:
a) Determine free irq/address to use if any (configure BIOS if need be)
b) Run "make config" or "make menuconfig" or "make xconfig"
Select (m) module for CONFIG_COMPUTONE under character
devices. CONFIG_PCI and CONFIG_MODULES also may need to be set.
c) Set address on ISA cards then:
edit /usr/src/linux/drivers/char/ip2.c if needed
or
edit config file in /etc/modprobe.d/ if needed (module).
or both to match this setting.
d) Run "make modules"
e) Run "make modules_install"
f) Run "/sbin/depmod -a"
g) install driver using `modprobe ip2 <options>` (options listed below)
h) run ip2mkdev (either the script below or the binary version)
Kernel installation:
a) Determine free irq/address to use if any (configure BIOS if need be)
b) Run "make config" or "make menuconfig" or "make xconfig"
Select (y) kernel for CONFIG_COMPUTONE under character
devices. CONFIG_PCI may need to be set if you have PCI bus.
c) Set address on ISA cards then:
edit /usr/src/linux/drivers/char/ip2.c
(Optional - may be specified on kernel command line now)
d) Run "make zImage" or whatever target you prefer.
e) mv /usr/src/linux/arch/x86/boot/zImage to /boot.
f) Add new config for this kernel into /etc/lilo.conf, run "lilo"
or copy to a floppy disk and boot from that floppy disk.
g) Reboot using this kernel
h) run ip2mkdev (either the script below or the binary version)
Kernel command line options:
When compiling the driver into the kernel, io and irq may be
compiled into the driver by editing ip2.c and setting the values for
io and irq in the appropriate array. An alternative is to specify
a command line parameter to the kernel at boot up.
ip2=io0,irq0,io1,irq1,io2,irq2,io3,irq3
Note that this order is very different from the specifications for the
modload parameters which have separate IRQ and IO specifiers.
The io port also selects PCI (1) and EISA (2) boards.
io=0 No board
io=1 PCI board
io=2 EISA board
else ISA board io address
You only need to specify the boards which are present.
Examples:
2 PCI boards:
ip2=1,0,1,0
1 ISA board at 0x310 irq 5:
ip2=0x310,5
This can be added to and "append" option in lilo.conf similar to this:
append="ip2=1,0,1,0"
3. INSTALLATION
Previously, the driver sources were packaged with a set of patch files
to update the character drivers' makefile and configuration file, and other
kernel source files. A build script (ip2build) was included which applies
the patches if needed, and build any utilities needed.
What you receive may be a single patch file in conventional kernel
patch format build script. That form can also be applied by
running patch -p1 < ThePatchFile. Otherwise run ip2build.
The driver can be installed as a module (recommended) or built into the
kernel. This is selected as for other drivers through the `make config`
command from the root of the Linux source tree. If the driver is built
into the kernel you will need to edit the file ip2.c to match the boards
you are installing. See that file for instructions. If the driver is
installed as a module the configuration can also be specified on the
modprobe command line as follows:
modprobe ip2 irq=irq1,irq2,irq3,irq4 io=addr1,addr2,addr3,addr4
where irqnum is one of the valid Intelliport II interrupts (3,4,5,7,10,11,
12,15) and addr1-4 are the base addresses for up to four controllers. If
the irqs are not specified the driver uses the default in ip2.c (which
selects polled mode). If no base addresses are specified the defaults in
ip2.c are used. If you are autoloading the driver module with kerneld or
kmod the base addresses and interrupt number must also be set in ip2.c
and recompile or just insert and options line in /etc/modprobe.d/*.conf or both.
The options line is equivalent to the command line and takes precedence over
what is in ip2.c.
config sample to put /etc/modprobe.d/*.conf:
options ip2 io=1,0x328 irq=1,10
alias char-major-71 ip2
alias char-major-72 ip2
alias char-major-73 ip2
The equivalent in ip2.c:
static int io[IP2_MAX_BOARDS]= { 1, 0x328, 0, 0 };
static int irq[IP2_MAX_BOARDS] = { 1, 10, -1, -1 };
The equivalent for the kernel command line (in lilo.conf):
append="ip2=1,1,0x328,10"
Note: Both io and irq should be updated to reflect YOUR system. An "io"
address of 1 or 2 indicates a PCI or EISA card in the board table.
The PCI or EISA irq will be assigned automatically.
Specifying an invalid or in-use irq will default the driver into
running in polled mode for that card. If all irq entries are 0 then
all cards will operate in polled mode.
If you select the driver as part of the kernel run :
make zlilo (or whatever you do to create a bootable kernel)
If you selected a module run :
make modules && make modules_install
The utility ip2mkdev (see 5 and 7 below) creates all the device nodes
required by the driver. For a device to be created it must be configured
in the driver and the board must be installed. Only devices corresponding
to real IntelliPort II ports are created. With multiple boards and expansion
boxes this will leave gaps in the sequence of device names. ip2mkdev uses
Linux tty naming conventions: ttyF0 - ttyF255 for normal devices, and
cuf0 - cuf255 for callout devices.
4. USING THE DRIVERS
As noted above, the driver implements the ports in accordance with Linux
conventions, and the devices should be interchangeable with the standard
serial devices. (This is a key point for problem reporting: please make
sure that what you are trying do works on the ttySx/cuax ports first; then
tell us what went wrong with the ip2 ports!)
Higher speeds can be obtained using the setserial utility which remaps
38,400 bps (extb) to 57,600 bps, 115,200 bps, or a custom speed.
Intelliport II installations using the PowerPort expansion module can
use the custom speed setting to select the highest speeds: 153,600 bps,
230,400 bps, 307,200 bps, 460,800bps and 921,600 bps. The base for
custom baud rate configuration is fixed at 921,600 for cards/expansion
modules with ST654's and 115200 for those with Cirrus CD1400's. This
corresponds to the maximum bit rates those chips are capable.
For example if the baud base is 921600 and the baud divisor is 18 then
the custom rate is 921600/18 = 51200 bps. See the setserial man page for
complete details. Of course if stty accepts the higher rates now you can
use that as well as the standard ioctls().
5. ip2mkdev and assorted utilities...
Several utilities, including the source for a binary ip2mkdev utility are
available under .../drivers/char/ip2. These can be build by changing to
that directory and typing "make" after the kernel has be built. If you do
not wish to compile the binary utilities, the shell script below can be
cut out and run as "ip2mkdev" to create the necessary device files. To
use the ip2mkdev script, you must have procfs enabled and the proc file
system mounted on /proc.
6. NOTES
This is a release version of the driver, but it is impossible to test it
in all configurations of Linux. If there is any anomalous behaviour that
does not match the standard serial port's behaviour please let us know.
7. ip2mkdev shell script
Previously, this script was simply attached here. It is now attached as a
shar archive to make it easier to extract the script from the documentation.
To create the ip2mkdev shell script change to a convenient directory (/tmp
works just fine) and run the following command:
unshar Documentation/serial/computone.txt
(This file)
You should now have a file ip2mkdev in your current working directory with
permissions set to execute. Running that script with then create the
necessary devices for the Computone boards, interfaces, and ports which
are present on you system at the time it is run.
#!/bin/sh
# This is a shell archive (produced by GNU sharutils 4.2.1).
# To extract the files from this archive, save it to some FILE, remove
# everything before the `!/bin/sh' line above, then type `sh FILE'.
#
# Made on 2001-10-29 10:32 EST by <mhw@alcove.wittsend.com>.
# Source directory was `/home2/src/tmp'.
#
# Existing files will *not* be overwritten unless `-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------
# 4251 -rwxr-xr-x ip2mkdev
#
save_IFS="${IFS}"
IFS="${IFS}:"
gettext_dir=FAILED
locale_dir=FAILED
first_param="$1"
for dir in $PATH
do
if test "$gettext_dir" = FAILED && test -f $dir/gettext \
&& ($dir/gettext --version >/dev/null 2>&1)
then
set `$dir/gettext --version 2>&1`
if test "$3" = GNU
then
gettext_dir=$dir
fi
fi
if test "$locale_dir" = FAILED && test -f $dir/shar \
&& ($dir/shar --print-text-domain-dir >/dev/null 2>&1)
then
locale_dir=`$dir/shar --print-text-domain-dir`
fi
done
IFS="$save_IFS"
if test "$locale_dir" = FAILED || test "$gettext_dir" = FAILED
then
echo=echo
else
TEXTDOMAINDIR=$locale_dir
export TEXTDOMAINDIR
TEXTDOMAIN=sharutils
export TEXTDOMAIN
echo="$gettext_dir/gettext -s"
fi
if touch -am -t 200112312359.59 $$.touch >/dev/null 2>&1 && test ! -f 200112312359.59 -a -f $$.touch; then
shar_touch='touch -am -t $1$2$3$4$5$6.$7 "$8"'
elif touch -am 123123592001.59 $$.touch >/dev/null 2>&1 && test ! -f 123123592001.59 -a ! -f 123123592001.5 -a -f $$.touch; then
shar_touch='touch -am $3$4$5$6$1$2.$7 "$8"'
elif touch -am 1231235901 $$.touch >/dev/null 2>&1 && test ! -f 1231235901 -a -f $$.touch; then
shar_touch='touch -am $3$4$5$6$2 "$8"'
else
shar_touch=:
echo
$echo 'WARNING: not restoring timestamps. Consider getting and'
$echo "installing GNU \`touch', distributed in GNU File Utilities..."
echo
fi
rm -f 200112312359.59 123123592001.59 123123592001.5 1231235901 $$.touch
#
if mkdir _sh17581; then
$echo 'x -' 'creating lock directory'
else
$echo 'failed to create lock directory'
exit 1
fi
# ============= ip2mkdev ==============
if test -f 'ip2mkdev' && test "$first_param" != -c; then
$echo 'x -' SKIPPING 'ip2mkdev' '(file already exists)'
else
$echo 'x -' extracting 'ip2mkdev' '(text)'
sed 's/^X//' << 'SHAR_EOF' > 'ip2mkdev' &&
#!/bin/sh -
#
# ip2mkdev
#
# Make or remove devices as needed for Computone Intelliport drivers
#
# First rule! If the dev file exists and you need it, don't mess
# with it. That prevents us from screwing up open ttys, ownership
# and permissions on a running system!
#
# This script will NOT remove devices that no longer exist if their
# board or interface box has been removed. If you want to get rid
# of them, you can manually do an "rm -f /dev/ttyF* /dev/cuaf*"
# before running this script. Running this script will then recreate
# all the valid devices.
#
# Michael H. Warfield
# /\/\|=mhw=|\/\/
# mhw@wittsend.com
#
# Updated 10/29/2000 for version 1.2.13 naming convention
# under devfs. /\/\|=mhw=|\/\/
#
# Updated 03/09/2000 for devfs support in ip2 drivers. /\/\|=mhw=|\/\/
#
X
if test -d /dev/ip2 ; then
# This is devfs mode... We don't do anything except create symlinks
# from the real devices to the old names!
X cd /dev
X echo "Creating symbolic links to devfs devices"
X for i in `ls ip2` ; do
X if test ! -L ip2$i ; then
X # Remove it incase it wasn't a symlink (old device)
X rm -f ip2$i
X ln -s ip2/$i ip2$i
X fi
X done
X for i in `( cd tts ; ls F* )` ; do
X if test ! -L tty$i ; then
X # Remove it incase it wasn't a symlink (old device)
X rm -f tty$i
X ln -s tts/$i tty$i
X fi
X done
X for i in `( cd cua ; ls F* )` ; do
X DEVNUMBER=`expr $i : 'F\(.*\)'`
X if test ! -L cuf$DEVNUMBER ; then
X # Remove it incase it wasn't a symlink (old device)
X rm -f cuf$DEVNUMBER
X ln -s cua/$i cuf$DEVNUMBER
X fi
X done
X exit 0
fi
X
if test ! -f /proc/tty/drivers
then
X echo "\
Unable to check driver status.
Make sure proc file system is mounted."
X
X exit 255
fi
X
if test ! -f /proc/tty/driver/ip2
then
X echo "\
Unable to locate ip2 proc file.
Attempting to load driver"
X
X if /sbin/insmod ip2
X then
X if test ! -f /proc/tty/driver/ip2
X then
X echo "\
Unable to locate ip2 proc file after loading driver.
Driver initialization failure or driver version error.
"
X exit 255
X fi
X else
X echo "Unable to load ip2 driver."
X exit 255
X fi
fi
X
# Ok... So we got the driver loaded and we can locate the procfs files.
# Next we need our major numbers.
X
TTYMAJOR=`sed -e '/^ip2/!d' -e '/\/dev\/tt/!d' -e 's/.*tt[^ ]*[ ]*\([0-9]*\)[ ]*.*/\1/' < /proc/tty/drivers`
CUAMAJOR=`sed -e '/^ip2/!d' -e '/\/dev\/cu/!d' -e 's/.*cu[^ ]*[ ]*\([0-9]*\)[ ]*.*/\1/' < /proc/tty/drivers`
BRDMAJOR=`sed -e '/^Driver: /!d' -e 's/.*IMajor=\([0-9]*\)[ ]*.*/\1/' < /proc/tty/driver/ip2`
X
echo "\
TTYMAJOR = $TTYMAJOR
CUAMAJOR = $CUAMAJOR
BRDMAJOR = $BRDMAJOR
"
X
# Ok... Now we should know our major numbers, if appropriate...
# Now we need our boards and start the device loops.
X
grep '^Board [0-9]:' /proc/tty/driver/ip2 | while read token number type alltherest
do
X # The test for blank "type" will catch the stats lead-in lines
X # if they exist in the file
X if test "$type" = "vacant" -o "$type" = "Vacant" -o "$type" = ""
X then
X continue
X fi
X
X BOARDNO=`expr "$number" : '\([0-9]\):'`
X PORTS=`expr "$alltherest" : '.*ports=\([0-9]*\)' | tr ',' ' '`
X MINORS=`expr "$alltherest" : '.*minors=\([0-9,]*\)' | tr ',' ' '`
X
X if test "$BOARDNO" = "" -o "$PORTS" = ""
X then
# This may be a bug. We should at least get this much information
X echo "Unable to process board line"
X continue
X fi
X
X if test "$MINORS" = ""
X then
# Silently skip this one. This board seems to have no boxes
X continue
X fi
X
X echo "board $BOARDNO: $type ports = $PORTS; port numbers = $MINORS"
X
X if test "$BRDMAJOR" != ""
X then
X BRDMINOR=`expr $BOARDNO \* 4`
X STSMINOR=`expr $BRDMINOR + 1`
X if test ! -c /dev/ip2ipl$BOARDNO ; then
X mknod /dev/ip2ipl$BOARDNO c $BRDMAJOR $BRDMINOR
X fi
X if test ! -c /dev/ip2stat$BOARDNO ; then
X mknod /dev/ip2stat$BOARDNO c $BRDMAJOR $STSMINOR
X fi
X fi
X
X if test "$TTYMAJOR" != ""
X then
X PORTNO=$BOARDBASE
X
X for PORTNO in $MINORS
X do
X if test ! -c /dev/ttyF$PORTNO ; then
X # We got the hardware but no device - make it
X mknod /dev/ttyF$PORTNO c $TTYMAJOR $PORTNO
X fi
X done
X fi
X
X if test "$CUAMAJOR" != ""
X then
X PORTNO=$BOARDBASE
X
X for PORTNO in $MINORS
X do
X if test ! -c /dev/cuf$PORTNO ; then
X # We got the hardware but no device - make it
X mknod /dev/cuf$PORTNO c $CUAMAJOR $PORTNO
X fi
X done
X fi
done
X
Xexit 0
SHAR_EOF
(set 20 01 10 29 10 32 01 'ip2mkdev'; eval "$shar_touch") &&
chmod 0755 'ip2mkdev' ||
$echo 'restore of' 'ip2mkdev' 'failed'
if ( md5sum --help 2>&1 | grep 'sage: md5sum \[' ) >/dev/null 2>&1 \
&& ( md5sum --version 2>&1 | grep -v 'textutils 1.12' ) >/dev/null; then
md5sum -c << SHAR_EOF >/dev/null 2>&1 \
|| $echo 'ip2mkdev:' 'MD5 check failed'
cb5717134509f38bad9fde6b1f79b4a4 ip2mkdev
SHAR_EOF
else
shar_count="`LC_ALL= LC_CTYPE= LANG= wc -c < 'ip2mkdev'`"
test 4251 -eq "$shar_count" ||
$echo 'ip2mkdev:' 'original size' '4251,' 'current size' "$shar_count!"
fi
fi
rm -fr _sh17581
exit 0

View File

@ -31,7 +31,7 @@ static void keep_alive(void)
* or "-e" to enable the card.
*/
void term(int sig)
static void term(int sig)
{
close(fd);
fprintf(stderr, "Stopping watchdog ticks...\n");

View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 6
SUBLEVEL = 0
EXTRAVERSION = -rc3
EXTRAVERSION = -rc5
NAME = Saber-toothed Squirrel
# *DOCUMENTATION*

View File

@ -223,6 +223,7 @@ srmcons_init(void)
driver->subtype = SYSTEM_TYPE_SYSCONS;
driver->init_termios = tty_std_termios;
tty_set_operations(driver, &srmcons_ops);
tty_port_link_device(&srmcons_singleton.port, driver, 0);
err = tty_register_driver(driver);
if (err) {
put_tty_driver(driver);

View File

@ -6,7 +6,7 @@ config ARM
select HAVE_DMA_API_DEBUG
select HAVE_IDE if PCI || ISA || PCMCIA
select HAVE_DMA_ATTRS
select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
select HAVE_DMA_CONTIGUOUS if MMU
select HAVE_MEMBLOCK
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
@ -2144,6 +2144,7 @@ source "drivers/cpufreq/Kconfig"
config CPU_FREQ_IMX
tristate "CPUfreq driver for i.MX CPUs"
depends on ARCH_MXC && CPU_FREQ
select CPU_FREQ_TABLE
help
This enables the CPUfreq driver for i.MX CPUs.

View File

@ -15,7 +15,7 @@
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};
ahb {

View File

@ -25,8 +25,8 @@
aips@70000000 { /* aips-1 */
spba@70000000 {
esdhc@70004000 { /* ESDHC1 */
fsl,cd-internal;
fsl,wp-internal;
fsl,cd-controller;
fsl,wp-controller;
status = "okay";
};

View File

@ -41,9 +41,13 @@
};
power-blue {
label = "power:blue";
gpios = <&gpio1 11 0>;
gpios = <&gpio1 10 0>;
linux,default-trigger = "timer";
};
power-red {
label = "power:red";
gpios = <&gpio1 11 0>;
};
usb1 {
label = "usb1:blue";
gpios = <&gpio1 12 0>;

View File

@ -33,7 +33,7 @@ CONFIG_AEABI=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
CONFIG_VFP=y

View File

@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_LM3530=y
CONFIG_LEDS_LP5521=y
CONFIG_LEDS_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AB8500=y
CONFIG_RTC_DRV_PL031=y

View File

@ -202,6 +202,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
}
/*
* This can be called during early boot to increase the size of the atomic
* coherent DMA pool above the default value of 256KiB. It must be called
* before postcore_initcall.
*/
extern void __init init_dma_coherent_pool_size(unsigned long size);
/*
* This can be called during boot to increase the size of the consistent
* DMA region above it's default value of 2MB. It must be called before the

View File

@ -197,7 +197,7 @@ void __init at91rm9200_timer_init(void)
at91_st_read(AT91_ST_SR);
/* Make IRQs happen for the system timer */
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
* directly for the clocksource and all clockevents, after adjusting

View File

@ -726,6 +726,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
},
};
@ -744,10 +746,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9260_rtt_device.num_resources = 2;
at91sam9260_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

View File

@ -609,6 +609,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -626,10 +628,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9261_rtt_device.num_resources = 2;
at91sam9261_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

View File

@ -990,6 +990,8 @@ static struct resource rtt0_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -1006,6 +1008,8 @@ static struct resource rtt1_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -1027,14 +1031,14 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed only for the chosen RTT:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9263_rtt0_device.num_resources = 2;
at91sam9263_rtt0_device.num_resources = 3;
at91sam9263_rtt1_device.num_resources = 1;
pdev = &at91sam9263_rtt0_device;
r = rtt0_resources;
break;
case 1:
at91sam9263_rtt0_device.num_resources = 1;
at91sam9263_rtt1_device.num_resources = 2;
at91sam9263_rtt1_device.num_resources = 3;
pdev = &at91sam9263_rtt1_device;
r = rtt1_resources;
break;
@ -1047,6 +1051,8 @@ static void __init at91_add_device_rtt_rtc(void)
pdev->name = "rtc-at91sam9";
r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
r[1].end = r[1].start + 3;
r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

View File

@ -1293,6 +1293,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -1310,10 +1312,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9g45_rtt_device.num_resources = 2;
at91sam9g45_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

View File

@ -688,6 +688,8 @@ static struct resource rtt_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_MEM,
}, {
.flags = IORESOURCE_IRQ,
}
};
@ -705,10 +707,12 @@ static void __init at91_add_device_rtt_rtc(void)
* The second resource is needed:
* GPBR will serve as the storage for RTC time offset
*/
at91sam9rl_rtt_device.num_resources = 2;
at91sam9rl_rtt_device.num_resources = 3;
rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
}
#else
static void __init at91_add_device_rtt_rtc(void)

View File

@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
#define cpu_has_300M_plla() (cpu_is_at91sam9g10())
#define cpu_has_240M_plla() (cpu_is_at91sam9261() \
|| cpu_is_at91sam9263() \
|| cpu_is_at91sam9rl())
#define cpu_has_210M_plla() (cpu_is_at91sam9260())
#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \
|| cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock)
} else if (cpu_has_800M_plla()) {
if (plla.rate_hz > 800000000)
pll_overclock = true;
} else if (cpu_has_240M_plla()) {
if (plla.rate_hz > 240000000)
pll_overclock = true;
} else if (cpu_has_210M_plla()) {
if (plla.rate_hz > 210000000)
pll_overclock = true;
} else {
if (plla.rate_hz > 209000000)
pll_overclock = true;

View File

@ -102,7 +102,8 @@ void __init dove_ehci1_init(void)
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
1600);
}
/*****************************************************************************

View File

@ -42,6 +42,7 @@
#include <plat/backlight.h>
#include <plat/fb.h>
#include <plat/mfc.h>
#include <plat/hdmi.h>
#include <mach/ohci.h>
#include <mach/map.h>
@ -734,6 +735,11 @@ static void __init origen_bt_setup(void)
s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
}
/* I2C module and id for HDMIPHY */
static struct i2c_board_info hdmiphy_info = {
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
static void s5p_tv_setup(void)
{
/* Direct HPD to HDMI chip */
@ -781,6 +787,7 @@ static void __init origen_machine_init(void)
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
#ifdef CONFIG_DRM_EXYNOS
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;

View File

@ -40,6 +40,7 @@
#include <plat/mfc.h>
#include <plat/ehci.h>
#include <plat/clock.h>
#include <plat/hdmi.h>
#include <mach/map.h>
#include <mach/ohci.h>
@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = {
.pwm_period_ns = 1000,
};
/* I2C module and id for HDMIPHY */
static struct i2c_board_info hdmiphy_info = {
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
static void s5p_tv_setup(void)
{
/* direct HPD to HDMI chip */
@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void)
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
samsung_keypad_set_platdata(&smdkv310_keypad_data);

View File

@ -17,6 +17,7 @@
#include <linux/sched.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/system_misc.h>
#include <mach/hardware.h>
#define IRQ_SOURCE(base_addr) (base_addr + 0x00)

View File

@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
clk-pfd.o clk-busy.o
@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
obj-$(CONFIG_CPU_V7) += head-v7.o
AFLAGS_head-v7.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += platsmp.o
AFLAGS_headsmp.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
endif
# i.MX5 based machines

View File

@ -152,7 +152,7 @@ enum mx6q_clks {
ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
clk_max
};
@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void)
clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_sel", base + 0x20, 10, 1);
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_sel", base + 0x20, 11, 1);
clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_div_3_5", base + 0x20, 10, 1);
clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_div_3_5", base + 0x20, 11, 1);
clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3);
clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3);
clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3);

View File

@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void)
: "cc");
}
static inline void cpu_leave_lowpower(void)
{
unsigned int v;
asm volatile(
"mrc p15, 0, %0, c1, c0, 0\n"
" orr %0, %0, %1\n"
" mcr p15, 0, %0, c1, c0, 0\n"
" mrc p15, 0, %0, c1, c0, 1\n"
" orr %0, %0, %2\n"
" mcr p15, 0, %0, c1, c0, 1\n"
: "=&r" (v)
: "Ir" (CR_C), "Ir" (0x40)
: "cc");
}
/*
* platform-specific code to shutdown a CPU
*
@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu)
{
cpu_enter_lowpower();
imx_enable_cpu(cpu, false);
cpu_do_idle();
cpu_leave_lowpower();
/* We should never return from idle */
panic("cpu %d unexpectedly exit from shutdown\n", cpu);
/* spin here until hardware takes it down */
while (1)
;
}
int platform_cpu_disable(unsigned int cpu)

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@ -71,7 +71,7 @@ soft:
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{
if (IS_ENABLED(CONFIG_PHYLIB)) {
if (IS_BUILTIN(CONFIG_PHYLIB)) {
/* min rx data delay */
phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000);
@ -112,7 +112,7 @@ put_clk:
static void __init imx6q_sabrelite_init(void)
{
if (IS_ENABLED(CONFIG_PHYLIB))
if (IS_BUILTIN(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);
imx6q_sabrelite_cko1_setup();

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@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-qnap-ts219.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb
dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb

View File

@ -301,7 +301,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
IRQ_KIRKWOOD_GE00_ERR);
IRQ_KIRKWOOD_GE00_ERR, 1600);
/* The interface forgets the MAC address assigned by u-boot if
the clock is turned off, so claim the clk now. */
clk_prepare_enable(ge0);
@ -315,7 +315,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
IRQ_KIRKWOOD_GE01_ERR);
IRQ_KIRKWOOD_GE01_ERR, 1600);
clk_prepare_enable(ge1);
}
@ -517,6 +517,13 @@ void __init kirkwood_wdt_init(void)
void __init kirkwood_init_early(void)
{
orion_time_set_base(TIMER_VIRT_BASE);
/*
* Some Kirkwood devices allocate their coherent buffers from atomic
* context. Increase size of atomic coherent pool to make sure such
* the allocations won't fail.
*/
init_dma_coherent_pool_size(SZ_1M);
}
int kirkwood_tclk;

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@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sizes.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>

View File

@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev)
struct resource *res;
int ret = 0;
if (!pdata && !pdata->pool_name)
if (!pdata || !pdata->pool_name)
return -ENODEV;
info = kzalloc(sizeof(*info), GFP_KERNEL);

View File

@ -37,7 +37,7 @@
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
static void __init __iomem *win_cfg_base(int win)
static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
{
/*
* Find the control register base address for this window.

View File

@ -213,7 +213,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
IRQ_MV78XX0_GE_ERR);
IRQ_MV78XX0_GE_ERR,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
}
@ -224,7 +225,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{
orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
NO_IRQ);
NO_IRQ,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
}

View File

@ -18,6 +18,7 @@
#include <plat/board-ams-delta.h>
#include <mach/irqs.h>
#include <mach/ams-delta-fiq.h>
#include "iomap.h"

View File

@ -26,6 +26,7 @@
#include <linux/export.h>
#include <linux/omapfb.h>
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <media/soc_camera.h>
@ -37,7 +38,6 @@
#include <plat/board-ams-delta.h>
#include <plat/keypad.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/ams-delta-fiq.h>

View File

@ -32,7 +32,6 @@
#include <plat/flash.h>
#include <plat/fpga.h>
#include <plat/keypad.h>
#include <plat/board.h>
#include <mach/hardware.h>

View File

@ -23,7 +23,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <mach/usb.h>
@ -52,9 +51,6 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
};
#endif
static struct omap_board_config_kernel generic_config[] __initdata = {
};
static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
@ -76,8 +72,6 @@ static void __init omap_generic_init(void)
}
#endif
omap_board_config = generic_config;
omap_board_config_size = ARRAY_SIZE(generic_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
}

View File

@ -41,8 +41,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <plat/omap7xx.h>
#include <plat/board.h>
#include <mach/omap7xx.h>
#include <plat/keypad.h>
#include <plat/mmc.h>

View File

@ -26,7 +26,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>

View File

@ -39,6 +39,8 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c/tps65010.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

View File

@ -28,6 +28,7 @@
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <linux/omapfb.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -37,7 +38,6 @@
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/dma.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>

View File

@ -27,6 +27,7 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -37,7 +38,6 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>

View File

@ -30,6 +30,7 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -39,7 +40,6 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>

View File

@ -32,7 +32,6 @@
#include <plat/fpga.h>
#include <plat/flash.h>
#include <plat/keypad.h>
#include <plat/board.h>
#include <mach/hardware.h>

View File

@ -38,7 +38,6 @@
#include <plat/dma.h>
#include <plat/irda.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/board-sx1.h>

View File

@ -35,7 +35,6 @@
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/usb.h>
@ -155,9 +154,6 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
.pins[2] = 6,
};
static struct omap_board_config_kernel voiceblue_config[] = {
};
#define MACHINE_PANICED 1
#define MACHINE_REBOOTING 2
#define MACHINE_REBOOT 4
@ -275,8 +271,6 @@ static void __init voiceblue_init(void)
voiceblue_smc91x_resources[1].start = gpio_to_irq(8);
voiceblue_smc91x_resources[1].end = gpio_to_irq(8);
platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
omap_board_config = voiceblue_config;
omap_board_config_size = ARRAY_SIZE(voiceblue_config);
omap_serial_init();
omap1_usb_init(&voiceblue_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);

View File

@ -25,7 +25,6 @@
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
#include <plat/board.h>
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <mach/hardware.h>
@ -788,7 +787,6 @@ u32 cpu_mask;
int __init omap1_clk_init(void)
{
struct omap_clk *c;
const struct omap_clock_config *info;
int crystal_type = 0; /* Default 12 MHz */
u32 reg;
@ -837,12 +835,6 @@ int __init omap1_clk_init(void)
ck_dpll1_p = clk_get(NULL, "ck_dpll1");
ck_ref_p = clk_get(NULL, "ck_ref");
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
if (info != NULL) {
if (!cpu_is_omap15xx())
crystal_type = info->system_clock_type;
}
if (cpu_is_omap7xx())
ck_ref.rate = 13000000;
if (cpu_is_omap16xx() && crystal_type == 2)

View File

@ -20,12 +20,11 @@
#include <asm/mach/map.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/mmc.h>
#include <plat/omap7xx.h>
#include <mach/omap7xx.h>
#include <mach/camera.h>
#include <mach/hardware.h>

View File

@ -27,7 +27,8 @@
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/irqs.h>
#include <mach/irqs.h>
#define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17

View File

@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1510_GPIO_BASE 0xFFFCE000

View File

@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#define OMAP1610_GPIO1_BASE 0xfffbe400
#define OMAP1610_GPIO2_BASE 0xfffbec00

View File

@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#define OMAP7XX_GPIO1_BASE 0xfffbc000
#define OMAP7XX_GPIO2_BASE 0xfffbc800

View File

@ -14,8 +14,6 @@
#ifndef __AMS_DELTA_FIQ_H
#define __AMS_DELTA_FIQ_H
#include <plat/irqs.h>
/*
* Interrupt number used for passing control from FIQ to IRQ.
* IRQ12, described as reserved, has been selected.

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@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap1/include/mach/gpio.h
*/
#include <plat/gpio.h>

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@ -1,11 +1,46 @@
/*
* arch/arm/mach-omap1/include/mach/hardware.h
*
* Hardware definitions for TI OMAP processors and boards
*
* NOTE: Please put device driver specific defines into a separate header
* file for each driver.
*
* Copyright (C) 2001 RidgeRun, Inc.
* Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
*
* Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
* and Dirk Behme <dirk.behme@de.bosch.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __MACH_HARDWARE_H
#define __MACH_HARDWARE_H
#ifndef __ASM_ARCH_OMAP_HARDWARE_H
#define __ASM_ARCH_OMAP_HARDWARE_H
#include <asm/sizes.h>
#ifndef __ASSEMBLER__
#include <asm/types.h>
#include <plat/cpu.h>
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
@ -35,7 +70,249 @@ static inline u32 omap_cs3_phys(void)
? 0 : OMAP_CS3_PHYS;
}
#endif
#endif /* ifndef __ASSEMBLER__ */
#include <plat/serial.h>
/*
* ---------------------------------------------------------------------------
* Common definitions for all OMAP processors
* NOTE: Put all processor or board specific parts to the special header
* files.
* ---------------------------------------------------------------------------
*/
/*
* ----------------------------------------------------------------------------
* Timers
* ----------------------------------------------------------------------------
*/
#define OMAP_MPU_TIMER1_BASE (0xfffec500)
#define OMAP_MPU_TIMER2_BASE (0xfffec600)
#define OMAP_MPU_TIMER3_BASE (0xfffec700)
#define MPU_TIMER_FREE (1 << 6)
#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
#define MPU_TIMER_AR (1 << 1)
#define MPU_TIMER_ST (1 << 0)
/*
* ----------------------------------------------------------------------------
* Clocks
* ----------------------------------------------------------------------------
*/
#define CLKGEN_REG_BASE (0xfffece00)
#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
#define CK_RATEF 1
#define CK_IDLEF 2
#define CK_ENABLEF 4
#define CK_SELECTF 8
#define SETARM_IDLE_SHIFT
/* DPLL control registers */
#define DPLL_CTL (0xfffecf00)
/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
/*
* ---------------------------------------------------------------------------
* UPLD
* ---------------------------------------------------------------------------
*/
#define ULPD_REG_BASE (0xfffe0800)
#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
# define SOFT_UDC_REQ (1 << 4)
# define SOFT_USB_CLK_REQ (1 << 3)
# define SOFT_DPLL_REQ (1 << 0)
#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
# define DIS_MMC2_DPLL_REQ (1 << 11)
# define DIS_MMC1_DPLL_REQ (1 << 10)
# define DIS_UART3_DPLL_REQ (1 << 9)
# define DIS_UART2_DPLL_REQ (1 << 8)
# define DIS_UART1_DPLL_REQ (1 << 7)
# define DIS_USB_HOST_DPLL_REQ (1 << 6)
#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
/*
* ---------------------------------------------------------------------------
* Watchdog timer
* ---------------------------------------------------------------------------
*/
/* Watchdog timer within the OMAP3.2 gigacell */
#define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0)
#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8)
/*
* ---------------------------------------------------------------------------
* Interrupts
* ---------------------------------------------------------------------------
*/
#ifdef CONFIG_ARCH_OMAP1
/*
* XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
* or something similar.. -- PFM.
*/
#define OMAP_IH1_BASE 0xfffecb00
#define OMAP_IH2_BASE 0xfffe0000
#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00)
#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)
#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10)
#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14)
#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18)
#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c)
#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00)
#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04)
#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10)
#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14)
#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18)
#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c)
#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
#define IRQ_ITR_REG_OFFSET 0x00
#define IRQ_MIR_REG_OFFSET 0x04
#define IRQ_SIR_IRQ_REG_OFFSET 0x10
#define IRQ_SIR_FIQ_REG_OFFSET 0x14
#define IRQ_CONTROL_REG_OFFSET 0x18
#define IRQ_ISR_REG_OFFSET 0x9c
#define IRQ_ILR0_REG_OFFSET 0x1c
#define IRQ_GMR_REG_OFFSET 0xa0
#endif
#include <plat/hardware.h>
/*
* ----------------------------------------------------------------------------
* System control registers
* ----------------------------------------------------------------------------
*/
#define MOD_CONF_CTRL_0 0xfffe1080
#define MOD_CONF_CTRL_1 0xfffe1110
/*
* ----------------------------------------------------------------------------
* Pin multiplexing registers
* ----------------------------------------------------------------------------
*/
#define FUNC_MUX_CTRL_0 0xfffe1000
#define FUNC_MUX_CTRL_1 0xfffe1004
#define FUNC_MUX_CTRL_2 0xfffe1008
#define COMP_MODE_CTRL_0 0xfffe100c
#define FUNC_MUX_CTRL_3 0xfffe1010
#define FUNC_MUX_CTRL_4 0xfffe1014
#define FUNC_MUX_CTRL_5 0xfffe1018
#define FUNC_MUX_CTRL_6 0xfffe101C
#define FUNC_MUX_CTRL_7 0xfffe1020
#define FUNC_MUX_CTRL_8 0xfffe1024
#define FUNC_MUX_CTRL_9 0xfffe1028
#define FUNC_MUX_CTRL_A 0xfffe102C
#define FUNC_MUX_CTRL_B 0xfffe1030
#define FUNC_MUX_CTRL_C 0xfffe1034
#define FUNC_MUX_CTRL_D 0xfffe1038
#define PULL_DWN_CTRL_0 0xfffe1040
#define PULL_DWN_CTRL_1 0xfffe1044
#define PULL_DWN_CTRL_2 0xfffe1048
#define PULL_DWN_CTRL_3 0xfffe104c
#define PULL_DWN_CTRL_4 0xfffe10ac
/* OMAP-1610 specific multiplexing registers */
#define FUNC_MUX_CTRL_E 0xfffe1090
#define FUNC_MUX_CTRL_F 0xfffe1094
#define FUNC_MUX_CTRL_10 0xfffe1098
#define FUNC_MUX_CTRL_11 0xfffe109c
#define FUNC_MUX_CTRL_12 0xfffe10a0
#define PU_PD_SEL_0 0xfffe10b4
#define PU_PD_SEL_1 0xfffe10b8
#define PU_PD_SEL_2 0xfffe10bc
#define PU_PD_SEL_3 0xfffe10c0
#define PU_PD_SEL_4 0xfffe10c4
/* Timer32K for 1610 and 1710*/
#define OMAP_TIMER32K_BASE 0xFFFBC400
/*
* ---------------------------------------------------------------------------
* TIPB bus interface
* ---------------------------------------------------------------------------
*/
#define TIPB_PUBLIC_CNTL_BASE 0xfffed300
#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8)
#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00
#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8)
/*
* ----------------------------------------------------------------------------
* MPUI interface
* ----------------------------------------------------------------------------
*/
#define MPUI_BASE (0xfffec900)
#define MPUI_CTRL (MPUI_BASE + 0x0)
#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4)
#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8)
#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc)
#define MPUI_STATUS_REG (MPUI_BASE + 0x10)
#define MPUI_DSP_STATUS (MPUI_BASE + 0x14)
#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18)
#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c)
/*
* ----------------------------------------------------------------------------
* LED Pulse Generator
* ----------------------------------------------------------------------------
*/
#define OMAP_LPG1_BASE 0xfffbd000
#define OMAP_LPG2_BASE 0xfffbd800
#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00)
#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04)
#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
/*
* ----------------------------------------------------------------------------
* Pulse-Width Light
* ----------------------------------------------------------------------------
*/
#define OMAP_PWL_BASE 0xfffb5800
#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00)
#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04)
/*
* ---------------------------------------------------------------------------
* Processor specific defines
* ---------------------------------------------------------------------------
*/
#include "omap7xx.h"
#include "omap1510.h"
#include "omap16xx.h"
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */

View File

@ -1,5 +1,268 @@
/*
* arch/arm/mach-omap1/include/mach/irqs.h
* arch/arm/plat-omap/include/mach/irqs.h
*
* Copyright (C) Greg Lonnon 2001
* Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610
* are different.
*/
#include <plat/irqs.h>
#ifndef __ASM_ARCH_OMAP15XX_IRQS_H
#define __ASM_ARCH_OMAP15XX_IRQS_H
/*
* IRQ numbers for interrupt handler 1
*
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
*
*/
#define INT_CAMERA 1
#define INT_FIQ 3
#define INT_RTDX 6
#define INT_DSP_MMU_ABORT 7
#define INT_HOST 8
#define INT_ABORT 9
#define INT_BRIDGE_PRIV 13
#define INT_GPIO_BANK1 14
#define INT_UART3 15
#define INT_TIMER3 16
#define INT_DMA_CH0_6 19
#define INT_DMA_CH1_7 20
#define INT_DMA_CH2_8 21
#define INT_DMA_CH3 22
#define INT_DMA_CH4 23
#define INT_DMA_CH5 24
#define INT_TIMER1 26
#define INT_WD_TIMER 27
#define INT_BRIDGE_PUB 28
#define INT_TIMER2 30
#define INT_LCD_CTRL 31
/*
* OMAP-1510 specific IRQ numbers for interrupt handler 1
*/
#define INT_1510_IH2_IRQ 0
#define INT_1510_RES2 2
#define INT_1510_SPI_TX 4
#define INT_1510_SPI_RX 5
#define INT_1510_DSP_MAILBOX1 10
#define INT_1510_DSP_MAILBOX2 11
#define INT_1510_RES12 12
#define INT_1510_LB_MMU 17
#define INT_1510_RES18 18
#define INT_1510_LOCAL_BUS 29
/*
* OMAP-1610 specific IRQ numbers for interrupt handler 1
*/
#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ
#define INT_1610_IH2_FIQ 2
#define INT_1610_McBSP2_TX 4
#define INT_1610_McBSP2_RX 5
#define INT_1610_DSP_MAILBOX1 10
#define INT_1610_DSP_MAILBOX2 11
#define INT_1610_LCD_LINE 12
#define INT_1610_GPTIMER1 17
#define INT_1610_GPTIMER2 18
#define INT_1610_SSR_FIFO_0 29
/*
* OMAP-7xx specific IRQ numbers for interrupt handler 1
*/
#define INT_7XX_IH2_FIQ 0
#define INT_7XX_IH2_IRQ 1
#define INT_7XX_USB_NON_ISO 2
#define INT_7XX_USB_ISO 3
#define INT_7XX_ICR 4
#define INT_7XX_EAC 5
#define INT_7XX_GPIO_BANK1 6
#define INT_7XX_GPIO_BANK2 7
#define INT_7XX_GPIO_BANK3 8
#define INT_7XX_McBSP2TX 10
#define INT_7XX_McBSP2RX 11
#define INT_7XX_McBSP2RX_OVF 12
#define INT_7XX_LCD_LINE 14
#define INT_7XX_GSM_PROTECT 15
#define INT_7XX_TIMER3 16
#define INT_7XX_GPIO_BANK5 17
#define INT_7XX_GPIO_BANK6 18
#define INT_7XX_SPGIO_WR 29
/*
* IRQ numbers for interrupt handler 2
*
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
*/
#define IH2_BASE 32
#define INT_KEYBOARD (1 + IH2_BASE)
#define INT_uWireTX (2 + IH2_BASE)
#define INT_uWireRX (3 + IH2_BASE)
#define INT_I2C (4 + IH2_BASE)
#define INT_MPUIO (5 + IH2_BASE)
#define INT_USB_HHC_1 (6 + IH2_BASE)
#define INT_McBSP3TX (10 + IH2_BASE)
#define INT_McBSP3RX (11 + IH2_BASE)
#define INT_McBSP1TX (12 + IH2_BASE)
#define INT_McBSP1RX (13 + IH2_BASE)
#define INT_UART1 (14 + IH2_BASE)
#define INT_UART2 (15 + IH2_BASE)
#define INT_BT_MCSI1TX (16 + IH2_BASE)
#define INT_BT_MCSI1RX (17 + IH2_BASE)
#define INT_SOSSI_MATCH (19 + IH2_BASE)
#define INT_USB_W2FC (20 + IH2_BASE)
#define INT_1WIRE (21 + IH2_BASE)
#define INT_OS_TIMER (22 + IH2_BASE)
#define INT_MMC (23 + IH2_BASE)
#define INT_GAUGE_32K (24 + IH2_BASE)
#define INT_RTC_TIMER (25 + IH2_BASE)
#define INT_RTC_ALARM (26 + IH2_BASE)
#define INT_MEM_STICK (27 + IH2_BASE)
/*
* OMAP-1510 specific IRQ numbers for interrupt handler 2
*/
#define INT_1510_DSP_MMU (28 + IH2_BASE)
#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
/*
* OMAP-1610 specific IRQ numbers for interrupt handler 2
*/
#define INT_1610_FAC (0 + IH2_BASE)
#define INT_1610_USB_HHC_2 (7 + IH2_BASE)
#define INT_1610_USB_OTG (8 + IH2_BASE)
#define INT_1610_SoSSI (9 + IH2_BASE)
#define INT_1610_SoSSI_MATCH (19 + IH2_BASE)
#define INT_1610_DSP_MMU (28 + IH2_BASE)
#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
#define INT_1610_STI (32 + IH2_BASE)
#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
#define INT_1610_GPTIMER3 (34 + IH2_BASE)
#define INT_1610_GPTIMER4 (35 + IH2_BASE)
#define INT_1610_GPTIMER5 (36 + IH2_BASE)
#define INT_1610_GPTIMER6 (37 + IH2_BASE)
#define INT_1610_GPTIMER7 (38 + IH2_BASE)
#define INT_1610_GPTIMER8 (39 + IH2_BASE)
#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
#define INT_1610_MMC2 (42 + IH2_BASE)
#define INT_1610_CF (43 + IH2_BASE)
#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE)
#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
#define INT_1610_SPI (49 + IH2_BASE)
#define INT_1610_DMA_CH6 (53 + IH2_BASE)
#define INT_1610_DMA_CH7 (54 + IH2_BASE)
#define INT_1610_DMA_CH8 (55 + IH2_BASE)
#define INT_1610_DMA_CH9 (56 + IH2_BASE)
#define INT_1610_DMA_CH10 (57 + IH2_BASE)
#define INT_1610_DMA_CH11 (58 + IH2_BASE)
#define INT_1610_DMA_CH12 (59 + IH2_BASE)
#define INT_1610_DMA_CH13 (60 + IH2_BASE)
#define INT_1610_DMA_CH14 (61 + IH2_BASE)
#define INT_1610_DMA_CH15 (62 + IH2_BASE)
#define INT_1610_NAND (63 + IH2_BASE)
#define INT_1610_SHA1MD5 (91 + IH2_BASE)
/*
* OMAP-7xx specific IRQ numbers for interrupt handler 2
*/
#define INT_7XX_HW_ERRORS (0 + IH2_BASE)
#define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE)
#define INT_7XX_CFCD (2 + IH2_BASE)
#define INT_7XX_CFIREQ (3 + IH2_BASE)
#define INT_7XX_I2C (4 + IH2_BASE)
#define INT_7XX_PCC (5 + IH2_BASE)
#define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE)
#define INT_7XX_SPI_100K_1 (7 + IH2_BASE)
#define INT_7XX_SYREN_SPI (8 + IH2_BASE)
#define INT_7XX_VLYNQ (9 + IH2_BASE)
#define INT_7XX_GPIO_BANK4 (10 + IH2_BASE)
#define INT_7XX_McBSP1TX (11 + IH2_BASE)
#define INT_7XX_McBSP1RX (12 + IH2_BASE)
#define INT_7XX_McBSP1RX_OF (13 + IH2_BASE)
#define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE)
#define INT_7XX_UART_MODEM_1 (15 + IH2_BASE)
#define INT_7XX_MCSI (16 + IH2_BASE)
#define INT_7XX_uWireTX (17 + IH2_BASE)
#define INT_7XX_uWireRX (18 + IH2_BASE)
#define INT_7XX_SMC_CD (19 + IH2_BASE)
#define INT_7XX_SMC_IREQ (20 + IH2_BASE)
#define INT_7XX_HDQ_1WIRE (21 + IH2_BASE)
#define INT_7XX_TIMER32K (22 + IH2_BASE)
#define INT_7XX_MMC_SDIO (23 + IH2_BASE)
#define INT_7XX_UPLD (24 + IH2_BASE)
#define INT_7XX_USB_HHC_1 (27 + IH2_BASE)
#define INT_7XX_USB_HHC_2 (28 + IH2_BASE)
#define INT_7XX_USB_GENI (29 + IH2_BASE)
#define INT_7XX_USB_OTG (30 + IH2_BASE)
#define INT_7XX_CAMERA_IF (31 + IH2_BASE)
#define INT_7XX_RNG (32 + IH2_BASE)
#define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE)
#define INT_7XX_DBB_RF_EN (34 + IH2_BASE)
#define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE)
#define INT_7XX_SHA1_MD5 (36 + IH2_BASE)
#define INT_7XX_SPI_100K_2 (37 + IH2_BASE)
#define INT_7XX_RNG_IDLE (38 + IH2_BASE)
#define INT_7XX_MPUIO (39 + IH2_BASE)
#define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
#define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE)
#define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE)
#define INT_7XX_LLPC_VSYNC (43 + IH2_BASE)
#define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE)
#define INT_7XX_DMA_CH6 (53 + IH2_BASE)
#define INT_7XX_DMA_CH7 (54 + IH2_BASE)
#define INT_7XX_DMA_CH8 (55 + IH2_BASE)
#define INT_7XX_DMA_CH9 (56 + IH2_BASE)
#define INT_7XX_DMA_CH10 (57 + IH2_BASE)
#define INT_7XX_DMA_CH11 (58 + IH2_BASE)
#define INT_7XX_DMA_CH12 (59 + IH2_BASE)
#define INT_7XX_DMA_CH13 (60 + IH2_BASE)
#define INT_7XX_DMA_CH14 (61 + IH2_BASE)
#define INT_7XX_DMA_CH15 (62 + IH2_BASE)
#define INT_7XX_NAND (63 + IH2_BASE)
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192
#define IH_GPIO_BASE (128 + IH2_BASE)
#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
#define OMAP_IRQ_END (IH_MPUIO_BASE + 16)
/* External FPGA handles interrupts on Innovator boards */
#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END)
#ifdef CONFIG_MACH_OMAP_INNOVATOR
#define OMAP_FPGA_NR_IRQS 24
#else
#define OMAP_FPGA_NR_IRQS 0
#endif
#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)
#define NR_IRQS OMAP_FPGA_IRQ_END
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
#include <mach/hardware.h>
#ifdef CONFIG_FIQ
#define FIQ_START 1024
#endif
#endif

View File

@ -1,5 +1,4 @@
/* arch/arm/plat-omap/include/mach/omap1510.h
*
/*
* Hardware definitions for TI OMAP1510 processor.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>

View File

@ -1,5 +1,4 @@
/* arch/arm/plat-omap/include/mach/omap16xx.h
*
/*
* Hardware definitions for TI OMAP1610/5912/1710 processors.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>

View File

@ -1,5 +1,4 @@
/* arch/arm/plat-omap/include/mach/omap7xx.h
*
/*
* Hardware definitions for TI OMAP7XX processor.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>

View File

@ -14,6 +14,7 @@
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <mach/hardware.h>
#include <asm/leds.h>

View File

@ -6,6 +6,7 @@
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_data/gpio-omap.h>
#include <asm/leds.h>
#include <asm/mach-types.h>

View File

@ -22,7 +22,6 @@
#include <asm/mach-types.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/fpga.h>

View File

@ -63,7 +63,7 @@ config ARCH_OMAP4
select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
select ARCH_NEEDS_CPU_IDLE_COUPLED
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
config SOC_OMAP5
bool "TI OMAP5"

View File

@ -33,7 +33,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>
@ -212,9 +211,6 @@ static struct regulator_init_data sdp2430_vmmc1 = {
};
static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
};
static struct twl4030_platform_data sdp2430_twldata = {
@ -235,7 +231,7 @@ static int __init omap2430_i2c_init(void)
sdp2430_i2c1_boardinfo[0].irq = gpio_to_irq(78);
omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
ARRAY_SIZE(sdp2430_i2c1_boardinfo));
omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
omap_pmic_init(2, 100, "twl4030", 7 + OMAP_INTC_START,
&sdp2430_twldata);
return 0;
}

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@ -25,13 +25,11 @@
#include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include <plat/usb.h>
#include "common.h"
#include <plat/dma.h>
@ -191,9 +189,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
.default_device = &sdp3430_lcd_device,
};
static struct omap_board_config_kernel sdp3430_config[] __initdata = {
};
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
@ -233,9 +228,6 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(16) | BIT(17),
.setup = sdp3430_twl_gpio_setup,
@ -576,8 +568,6 @@ static void __init omap_3430sdp_init(void)
int gpio_pendown;
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap_hsmmc_init(mmc);
omap3430_i2c_init();
omap_display_init(&sdp3430_dss_data);

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@ -17,7 +17,6 @@
#include <asm/mach/arch.h>
#include "common.h"
#include <plat/board.h>
#include <plat/gpmc-smc91x.h>
#include <plat/usb.h>
@ -67,9 +66,6 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
static struct omap_board_config_kernel sdp_config[] __initdata = {
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
@ -197,8 +193,6 @@ static struct flash_partitions sdp_flash_partitions[] = {
static void __init omap_sdp_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
omap_board_config = sdp_config;
omap_board_config_size = ARRAY_SIZE(sdp_config);
zoom_peripherals_init();
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);

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@ -28,13 +28,11 @@
#include <linux/leds_pwm.h>
#include <linux/platform_data/omap4-keypad.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/mmc.h>
@ -45,6 +43,7 @@
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
#include "soc.h"
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
@ -544,7 +543,6 @@ static struct twl6040_platform_data twl6040_data = {
.codec = &twl6040_codec,
.vibra = &twl6040_vibra,
.audpwron_gpio = 127,
.irq_base = TWL6040_CODEC_IRQ_BASE,
};
static struct twl4030_platform_data sdp4430_twldata = {
@ -581,7 +579,7 @@ static int __init omap4_i2c_init(void)
TWL_COMMON_REGULATOR_V1V8 |
TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &sdp4430_twldata,
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
&twl6040_data, 119 + OMAP44XX_IRQ_GIC_START);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
ARRAY_SIZE(sdp4430_i2c_3_boardinfo));

View File

@ -21,12 +21,10 @@
#include <linux/init.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
@ -37,11 +35,6 @@
#define GPIO_USB_POWER 35
#define GPIO_USB_NRESET 38
/* Board initialization */
static struct omap_board_config_kernel am3517_crane_config[] __initdata = {
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
@ -67,9 +60,6 @@ static void __init am3517_crane_init(void)
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_board_config = am3517_crane_config;
omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
/* Configure GPIO for EHCI port */
if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) {
pr_err("Can not configure mux for GPIO_USB_NRESET %d\n",

View File

@ -25,14 +25,13 @@
#include <linux/can/platform/ti_hecc.h>
#include <linux/davinci_emac.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/gpio-omap.h>
#include <mach/hardware.h>
#include <mach/am35xx.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <video/omapdss.h>
@ -296,8 +295,7 @@ static struct resource am3517_hecc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_35XX_HECC0_IRQ,
.end = INT_35XX_HECC0_IRQ,
.start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
};
@ -324,9 +322,6 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
platform_device_register(&am3517_hecc_device);
}
static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
};
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
@ -346,8 +341,6 @@ static struct omap2_hsmmc_info mmc[] = {
static void __init am3517_evm_init(void)
{
omap_board_config = am3517_evm_config;
omap_board_config_size = ARRAY_SIZE(am3517_evm_config);
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
am3517_evm_i2c_init();

View File

@ -29,13 +29,11 @@
#include <linux/smc91x.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <plat/led.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>

View File

@ -23,6 +23,7 @@
#include <linux/input/matrix_keypad.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/twl.h>
@ -37,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/nand.h>
#include <plat/gpmc.h>
@ -470,9 +470,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
}
static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = cm_t35_twl_gpio_setup,
};
@ -714,13 +711,8 @@ static inline void cm_t35_init_mux(void) {}
static inline void cm_t3730_init_mux(void) {}
#endif
static struct omap_board_config_kernel cm_t35_config[] __initdata = {
};
static void __init cm_t3x_common_init(void)
{
omap_board_config = cm_t35_config;
omap_board_config_size = ARRAY_SIZE(cm_t35_config);
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,

View File

@ -38,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/nand.h>
@ -90,8 +89,7 @@ static struct resource cm_t3517_hecc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_35XX_HECC0_IRQ,
.end = INT_35XX_HECC0_IRQ,
.start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
};
@ -249,9 +247,6 @@ static void __init cm_t3517_init_nand(void)
static inline void cm_t3517_init_nand(void) {}
#endif
static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
/* GPIO186 - Green LED */
@ -285,8 +280,6 @@ static void __init cm_t3517_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_board_config = cm_t3517_config;
omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
cm_t3517_init_leds();
cm_t3517_init_nand();
cm_t3517_init_rtc();

View File

@ -32,15 +32,12 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <mach/id.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@ -56,7 +53,6 @@
#include <linux/interrupt.h>
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mux.h"
#include "hsmmc.h"
#include "common-board-devices.h"
@ -236,9 +232,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(15) | BIT(16) | BIT(17),

View File

@ -16,13 +16,14 @@
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <plat/irqs.h>
#include <plat/cpu.h>
#include <plat/gpmc.h>
#include <plat/nand.h>
#include <plat/onenand.h>
#include <plat/tc.h>
#include "common.h"
#include "board-flash.h"
#define REG_FPGA_REV 0x10
@ -140,7 +141,6 @@ __init board_nand_init(struct mtd_partition *nand_parts,
board_nand_data.devsize = nand_type;
board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
gpmc_nand_init(&board_nand_data);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */

View File

@ -16,11 +16,9 @@
#include <linux/of_platform.h>
#include <linux/irqdomain.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <plat/board.h>
#include "common.h"
#include "common-board-devices.h"

View File

@ -27,20 +27,19 @@
#include <linux/io.h>
#include <linux/input/matrix_keypad.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <plat/menelaus.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
#include <plat/debug-devices.h>
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>
#include "common.h"
#include "mux.h"
#include "control.h"

View File

@ -29,10 +29,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
#include <plat/onenand.h>
@ -425,9 +425,6 @@ static int igep_twl_gpio_setup(struct device *dev,
};
static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = igep_twl_gpio_setup,
};

View File

@ -29,18 +29,14 @@
#include <linux/smsc911x.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <mach/board-zoom.h>
#include <asm/delay.h>
#include <plat/usb.h>
#include <plat/gpmc-smsc911x.h>
@ -275,9 +271,6 @@ static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
}
static struct twl4030_gpio_platform_data ldp_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = ldp_twl_gpio_setup,
};

View File

@ -25,14 +25,11 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <plat/board.h>
#include "common.h"
#include <plat/menelaus.h>
#include <mach/irqs.h>
#include <plat/mcspi.h>
#include <plat/onenand.h>
#include <plat/mmc.h>
#include <plat/serial.h>
#include "mux.h"
@ -600,7 +597,7 @@ static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
{
I2C_BOARD_INFO("menelaus", 0x72),
.irq = INT_24XX_SYS_NIRQ,
.irq = 7 + OMAP_INTC_START,
.platform_data = &n8x0_menelaus_platform_data,
},
};

View File

@ -33,13 +33,11 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <plat/board.h>
#include "common.h"
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
@ -297,9 +295,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data beagle_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)

View File

@ -40,12 +40,10 @@
#include <linux/mmc/host.h>
#include <linux/export.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/usb.h>
#include <plat/nand.h>
#include "common.h"
@ -58,6 +56,7 @@
#include "hsmmc.h"
#include "common-board-devices.h"
#define OMAP3_EVM_TS_GPIO 175
#define OMAP3_EVM_EHCI_VBUS 22
#define OMAP3_EVM_EHCI_SELECT 61
@ -74,6 +73,18 @@
#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
/*
* OMAP35x EVM revision
* Run time detection of EVM revision is done by reading Ethernet
* PHY ID -
* GEN_1 = 0x01150000
* GEN_2 = 0x92200000
*/
enum {
OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
};
static u8 omap3_evm_version;
u8 get_omap3_evm_rev(void)
@ -376,9 +387,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = omap3evm_twl_gpio_setup,
};
@ -525,9 +533,6 @@ static int __init omap3_evm_i2c_init(void)
return 0;
}
static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
};
static struct usbhs_omap_board_data usbhs_bdata __initdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
@ -687,9 +692,6 @@ static void __init omap3_evm_init(void)
obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
omap3_mux_init(obm, OMAP_PACKAGE_CBB);
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);

View File

@ -30,24 +30,21 @@
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
#include "common-board-devices.h"
#include <plat/mux.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc-smsc911x.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
#include <plat/usb.h>
#include "common.h"
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
#include "common-board-devices.h"
#define OMAP3LOGIC_SMSC911X_CS 1
#define OMAP3530_LV_SOM_MMC_GPIO_CD 110
@ -78,9 +75,6 @@ static struct regulator_init_data omap3logic_vmmc1 = {
};
static struct twl4030_gpio_platform_data omap3logic_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8)

View File

@ -40,9 +40,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <mach/hardware.h>
#include <plat/mcspi.h>
#include <plat/usb.h>
#include <video/omapdss.h>
@ -321,9 +319,6 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = omap3pandora_twl_gpio_setup,
};

View File

@ -28,14 +28,17 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/smsc911x.h>
#include <linux/i2c/at24.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@ -279,9 +282,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = omap3stalker_twl_gpio_setup,
};
@ -362,9 +362,6 @@ static int __init omap3_stalker_i2c_init(void)
#define OMAP3_STALKER_TS_GPIO 175
static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
};
static struct platform_device *omap3_stalker_devices[] __initdata = {
&keys_gpio,
};
@ -399,8 +396,6 @@ static void __init omap3_stalker_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
omap_board_config = omap3_stalker_config;
omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);

View File

@ -37,14 +37,12 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/system_info.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
#include <plat/nand.h>
@ -139,9 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data touchbook_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)

View File

@ -32,19 +32,18 @@
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <video/omapdss.h>
#include <plat/board.h>
#include "common.h"
#include <plat/usb.h>
#include <plat/mmc.h>
#include <video/omap-panel-tfp410.h>
#include "soc.h"
#include "hsmmc.h"
#include "control.h"
#include "mux.h"
@ -263,7 +262,6 @@ static struct twl6040_codec_data twl6040_codec = {
static struct twl6040_platform_data twl6040_data = {
.codec = &twl6040_codec,
.audpwron_gpio = 127,
.irq_base = TWL6040_CODEC_IRQ_BASE,
};
/* Panda board uses the common PMIC configuration */
@ -294,7 +292,7 @@ static int __init omap4_panda_i2c_init(void)
TWL_COMMON_REGULATOR_V1V8 |
TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &omap4_panda_twldata,
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
&twl6040_data, 119 + OMAP44XX_IRQ_GIC_START);
omap_register_i2c_bus(2, 400, NULL, 0);
/*
* Bus 3 is attached to the DVI port where devices like the pico DLP

View File

@ -42,16 +42,13 @@
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include "common.h"
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>
#include <video/omap-panel-tfp410.h>
#include <plat/gpmc.h>
#include <mach/hardware.h>
#include <plat/nand.h>
#include <plat/mcspi.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include "mux.h"
@ -399,9 +396,6 @@ static int overo_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data overo_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = overo_twl_gpio_setup,
};

View File

@ -27,6 +27,7 @@
#include <plat/gpmc.h>
#include "common.h"
#include <plat/onenand.h>
#include <plat/serial.h>
#include "mux.h"
#include "hsmmc.h"
@ -72,9 +73,6 @@ static struct platform_device *rm680_peripherals_devices[] __initdata = {
/* TWL */
static struct twl4030_gpio_platform_data rm680_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pullups = BIT(0),
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
};
@ -87,7 +85,7 @@ static struct twl4030_platform_data rm680_twl_data = {
static void __init rm680_i2c_init(void)
{
omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
omap_pmic_init(1, 2900, "twl5031", 7 + OMAP_INTC_START, &rm680_twl_data);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
}

View File

@ -28,7 +28,6 @@
#include <asm/system_info.h>
#include <plat/mcspi.h>
#include <plat/board.h>
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>
@ -774,9 +773,6 @@ static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
}
static struct twl4030_gpio_platform_data rx51_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
| BIT(4) | BIT(5)
| BIT(8) | BIT(9) | BIT(10) | BIT(11)
@ -1051,7 +1047,7 @@ static int __init rx51_i2c_init(void)
rx51_twldata.vdac->constraints.apply_uV = true;
rx51_twldata.vdac->constraints.name = "VDAC";
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)

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