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serial: 8250: Correct the clock for OxSemi PCIe devices
Oxford Semiconductor PCIe (Tornado) serial port devices are driven by a
fixed 62.5MHz clock input derived from the 100MHz PCI Express clock.
In the enhanced (650) mode, which we select in `autoconfig_has_efr' by
setting the ECB bit in the EFR register, and in the absence of clock
reconfiguration, which we currently don't do, the clock rate is divided
only by the oversampling rate of 16 as it is supplied to the baud rate
generator, yielding the baud base of 3906250. This comes from the reset
values of the TCR and MCR[7] registers which are both zero[1][2][3][4],
choosing the oversampling rate of 16 and the normal (divide by 1) baud
rate generator prescaler respectively. This is the rate that is divided
by the value held in the divisor latch to determine the baud rate used.
Replace the incorrect baud base of 4000000 with the right value of
3906250 then.
References:
[1] "OXPCIe200 PCI Express Multi-Port Bridge", Oxford Semiconductor,
Inc., DS-0045, 10 Nov 2008, Section "Reset Configuration", p. 72
[2] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port",
Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Section "Reset
Configuration", p. 27
[3] "OXPCIe954 PCI Express Bridge to Quad Serial Port", Oxford
Semiconductor, Inc., DS-0047, Feb 08, Section "Reset Configuration",
p. 28
[4] "OXPCIe958 PCI Express Bridge to Octal Serial Port", Oxford
Semiconductor, Inc., DS-0048, Feb 08, Section "Reset Configuration",
p. 28
Fixes: 7106b4e333 ("8250: Oxford Semiconductor Devices")
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2106100203510.5469@angie.orcam.me.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Maciej W. Rozycki
Greg Kroah-Hartman
parent
f771a34b14
commit
6cbe45d8ac
1 changed files with 64 additions and 64 deletions
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@ -2851,7 +2851,7 @@ enum pci_board_num_t {
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pbn_b0_2_1843200,
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pbn_b0_4_1843200,
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pbn_b0_1_4000000,
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pbn_b0_1_3906250,
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pbn_b0_bt_1_115200,
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pbn_b0_bt_2_115200,
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@ -2931,10 +2931,10 @@ enum pci_board_num_t {
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pbn_plx_romulus,
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pbn_endrun_2_4000000,
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pbn_oxsemi,
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pbn_oxsemi_1_4000000,
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pbn_oxsemi_2_4000000,
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pbn_oxsemi_4_4000000,
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pbn_oxsemi_8_4000000,
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pbn_oxsemi_1_3906250,
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pbn_oxsemi_2_3906250,
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pbn_oxsemi_4_3906250,
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pbn_oxsemi_8_3906250,
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pbn_intel_i960,
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pbn_sgi_ioc3,
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pbn_computone_4,
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@ -3081,10 +3081,10 @@ static struct pciserial_board pci_boards[] = {
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.uart_offset = 8,
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},
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[pbn_b0_1_4000000] = {
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[pbn_b0_1_3906250] = {
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.flags = FL_BASE0,
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.num_ports = 1,
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.base_baud = 4000000,
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.base_baud = 3906250,
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.uart_offset = 8,
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},
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@ -3479,31 +3479,31 @@ static struct pciserial_board pci_boards[] = {
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.base_baud = 115200,
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.uart_offset = 8,
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},
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[pbn_oxsemi_1_4000000] = {
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[pbn_oxsemi_1_3906250] = {
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.flags = FL_BASE0,
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.num_ports = 1,
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.base_baud = 4000000,
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.base_baud = 3906250,
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.uart_offset = 0x200,
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.first_offset = 0x1000,
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},
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[pbn_oxsemi_2_4000000] = {
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[pbn_oxsemi_2_3906250] = {
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.flags = FL_BASE0,
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.num_ports = 2,
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.base_baud = 4000000,
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.base_baud = 3906250,
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.uart_offset = 0x200,
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.first_offset = 0x1000,
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},
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[pbn_oxsemi_4_4000000] = {
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[pbn_oxsemi_4_3906250] = {
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.flags = FL_BASE0,
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.num_ports = 4,
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.base_baud = 4000000,
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.base_baud = 3906250,
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.uart_offset = 0x200,
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.first_offset = 0x1000,
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},
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[pbn_oxsemi_8_4000000] = {
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[pbn_oxsemi_8_3906250] = {
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.flags = FL_BASE0,
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.num_ports = 8,
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.base_baud = 4000000,
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.base_baud = 3906250,
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.uart_offset = 0x200,
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.first_offset = 0x1000,
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},
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@ -4510,158 +4510,158 @@ static const struct pci_device_id serial_pci_tbl[] = {
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*/
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{ PCI_VENDOR_ID_OXSEMI, 0xc101, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc105, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc11b, /* OXPCIe952 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc11f, /* OXPCIe952 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc120, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc124, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc138, /* OXPCIe952 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc13d, /* OXPCIe952 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc140, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc141, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc144, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc145, /* OXPCIe952 1 Legacy UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_1_4000000 },
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pbn_b0_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc158, /* OXPCIe952 2 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_2_4000000 },
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pbn_oxsemi_2_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc15d, /* OXPCIe952 2 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_2_4000000 },
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pbn_oxsemi_2_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc208, /* OXPCIe954 4 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_4_4000000 },
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pbn_oxsemi_4_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc20d, /* OXPCIe954 4 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_4_4000000 },
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pbn_oxsemi_4_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc308, /* OXPCIe958 8 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_8_4000000 },
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pbn_oxsemi_8_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc30d, /* OXPCIe958 8 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_8_4000000 },
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pbn_oxsemi_8_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc40b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc40f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc41b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc41f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc42b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc42f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc43b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc43f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc44b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc44f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc45b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc45f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc46b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc46f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc47b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc47f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc48b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc48f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc49b, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc49f, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc4ab, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc4af, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc4bb, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc4bf, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc4cb, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_OXSEMI, 0xc4cf, /* OXPCIe200 1 Native UART */
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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/*
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* Mainpine Inc. IQ Express "Rev3" utilizing OxSemi Tornado
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*/
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{ PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 1 Port V.34 Super-G3 Fax */
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PCI_VENDOR_ID_MAINPINE, 0x4001, 0, 0,
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pbn_oxsemi_1_4000000 },
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pbn_oxsemi_1_3906250 },
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{ PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 2 Port V.34 Super-G3 Fax */
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PCI_VENDOR_ID_MAINPINE, 0x4002, 0, 0,
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pbn_oxsemi_2_4000000 },
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pbn_oxsemi_2_3906250 },
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{ PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 4 Port V.34 Super-G3 Fax */
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PCI_VENDOR_ID_MAINPINE, 0x4004, 0, 0,
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pbn_oxsemi_4_4000000 },
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pbn_oxsemi_4_3906250 },
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{ PCI_VENDOR_ID_MAINPINE, 0x4000, /* IQ Express 8 Port V.34 Super-G3 Fax */
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PCI_VENDOR_ID_MAINPINE, 0x4008, 0, 0,
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pbn_oxsemi_8_4000000 },
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pbn_oxsemi_8_3906250 },
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/*
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* Digi/IBM PCIe 2-port Async EIA-232 Adapter utilizing OxSemi Tornado
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*/
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{ PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_2_OX_IBM,
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PCI_SUBVENDOR_ID_IBM, PCI_ANY_ID, 0, 0,
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pbn_oxsemi_2_4000000 },
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pbn_oxsemi_2_3906250 },
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/*
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* SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards,
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