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drm/amdgpu: delete pp_enable in adev
amdgpu not care powerplay or dpm is enabled. just check ip functions and pp functions Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
790d84fdc9
commit
6d07fe7bca
4 changed files with 53 additions and 50 deletions
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@ -1525,7 +1525,6 @@ struct amdgpu_device {
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/* powerplay */
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struct amd_powerplay powerplay;
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bool pp_enabled;
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bool pp_force_state_enabled;
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/* dpm */
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@ -64,10 +64,6 @@ static const struct cg_flag_name clocks[] = {
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void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
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{
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if (adev->pp_enabled)
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/* TODO */
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return;
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if (adev->pm.dpm_enabled) {
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mutex_lock(&adev->pm.mutex);
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if (power_supply_is_system_supplied() > 0)
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@ -118,7 +114,7 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev,
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goto fail;
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}
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if (adev->pp_enabled) {
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);
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} else {
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mutex_lock(&adev->pm.mutex);
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@ -303,7 +299,8 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev,
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if (strlen(buf) == 1)
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adev->pp_force_state_enabled = false;
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else if (adev->pp_enabled) {
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else if (adev->powerplay.pp_funcs->dispatch_tasks &&
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adev->powerplay.pp_funcs->get_pp_num_states) {
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struct pp_states_info data;
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ret = kstrtoul(buf, 0, &idx);
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@ -531,7 +528,7 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
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if (adev->powerplay.pp_funcs->set_sclk_od)
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amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
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if (adev->pp_enabled) {
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
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} else {
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adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
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@ -575,7 +572,7 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
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if (adev->powerplay.pp_funcs->set_mclk_od)
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amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
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if (adev->pp_enabled) {
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
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} else {
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adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
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@ -959,9 +956,6 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
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attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
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return 0;
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if (adev->pp_enabled)
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return effective_mode;
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/* Skip fan attributes if fan is not present */
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if (adev->pm.no_fan &&
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(attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
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@ -1344,27 +1338,26 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
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return ret;
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}
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if (adev->pp_enabled) {
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ret = device_create_file(adev->dev, &dev_attr_pp_num_states);
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if (ret) {
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DRM_ERROR("failed to create device file pp_num_states\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_cur_state);
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if (ret) {
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DRM_ERROR("failed to create device file pp_cur_state\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_force_state);
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if (ret) {
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DRM_ERROR("failed to create device file pp_force_state\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_table);
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if (ret) {
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DRM_ERROR("failed to create device file pp_table\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_num_states);
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if (ret) {
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DRM_ERROR("failed to create device file pp_num_states\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_cur_state);
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if (ret) {
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DRM_ERROR("failed to create device file pp_cur_state\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_force_state);
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if (ret) {
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DRM_ERROR("failed to create device file pp_force_state\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_table);
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if (ret) {
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DRM_ERROR("failed to create device file pp_table\n");
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return ret;
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}
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ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk);
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@ -1427,12 +1420,12 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
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hwmon_device_unregister(adev->pm.int_hwmon_dev);
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device_remove_file(adev->dev, &dev_attr_power_dpm_state);
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device_remove_file(adev->dev, &dev_attr_power_dpm_force_performance_level);
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if (adev->pp_enabled) {
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device_remove_file(adev->dev, &dev_attr_pp_num_states);
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device_remove_file(adev->dev, &dev_attr_pp_cur_state);
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device_remove_file(adev->dev, &dev_attr_pp_force_state);
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device_remove_file(adev->dev, &dev_attr_pp_table);
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}
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device_remove_file(adev->dev, &dev_attr_pp_num_states);
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device_remove_file(adev->dev, &dev_attr_pp_cur_state);
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device_remove_file(adev->dev, &dev_attr_pp_force_state);
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device_remove_file(adev->dev, &dev_attr_pp_table);
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device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk);
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device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk);
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device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie);
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@ -1463,7 +1456,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
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amdgpu_fence_wait_empty(ring);
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}
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if (adev->pp_enabled) {
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if (adev->powerplay.pp_funcs->dispatch_tasks) {
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL, NULL);
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} else {
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mutex_lock(&adev->pm.mutex);
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@ -1598,15 +1591,15 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
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if ((adev->flags & AMD_IS_PX) &&
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(ddev->switch_power_state != DRM_SWITCH_POWER_ON)) {
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seq_printf(m, "PX asic powered off\n");
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} else if (adev->pp_enabled) {
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return amdgpu_debugfs_pm_info_pp(m, adev);
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} else {
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} else if (adev->powerplay.pp_funcs->debugfs_print_current_performance_level) {
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mutex_lock(&adev->pm.mutex);
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if (adev->powerplay.pp_funcs->debugfs_print_current_performance_level)
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adev->powerplay.pp_funcs->debugfs_print_current_performance_level(adev, m);
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else
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seq_printf(m, "Debugfs support not implemented for this asic\n");
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mutex_unlock(&adev->pm.mutex);
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} else {
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return amdgpu_debugfs_pm_info_pp(m, adev);
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}
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return 0;
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@ -59,7 +59,6 @@ static int amdgpu_pp_early_init(void *handle)
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int ret = 0;
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amd_pp = &(adev->powerplay);
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adev->pp_enabled = false;
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amd_pp->pp_handle = (void *)adev;
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switch (adev->asic_type) {
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@ -73,7 +72,6 @@ static int amdgpu_pp_early_init(void *handle)
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case CHIP_STONEY:
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case CHIP_VEGA10:
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case CHIP_RAVEN:
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adev->pp_enabled = true;
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amd_pp->cgs_device = amdgpu_cgs_create_device(adev);
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if (amdgpu_create_pp_handle(adev))
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return -EINVAL;
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@ -138,9 +136,6 @@ static int amdgpu_pp_late_init(void *handle)
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ret = adev->powerplay.ip_funcs->late_init(
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adev->powerplay.pp_handle);
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if (adev->pp_enabled && adev->pm.dpm_enabled)
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amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
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return ret;
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}
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@ -212,7 +207,7 @@ static void amdgpu_pp_late_fini(void *handle)
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adev->powerplay.pp_handle);
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if (adev->pp_enabled) {
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if (adev->powerplay.cgs_device) {
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amd_powerplay_destroy(adev->powerplay.pp_handle);
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amdgpu_cgs_destroy_device(adev->powerplay.cgs_device);
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}
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@ -30,6 +30,9 @@
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#include "pp_instance.h"
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#include "power_state.h"
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static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
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void *input, void *output);
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static inline int pp_check(struct pp_instance *handle)
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{
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if (handle == NULL || handle->pp_valid != PP_VALID)
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@ -146,6 +149,19 @@ static int pp_hw_fini(void *handle)
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return 0;
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}
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static int pp_late_init(void *handle)
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{
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struct pp_instance *pp_handle = (struct pp_instance *)handle;
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int ret = 0;
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ret = pp_check(pp_handle);
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if (ret == 0)
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pp_dpm_dispatch_tasks(pp_handle,
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AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
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return 0;
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}
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static bool pp_is_idle(void *handle)
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{
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return false;
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@ -254,7 +270,7 @@ static int pp_resume(void *handle)
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const struct amd_ip_funcs pp_ip_funcs = {
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.name = "powerplay",
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.early_init = pp_early_init,
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.late_init = NULL,
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.late_init = pp_late_init,
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.sw_init = pp_sw_init,
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.sw_fini = pp_sw_fini,
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.hw_init = pp_hw_init,
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