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clk: rockchip: rk3288 export i2s0_clkout for use in DT
This exposes the clock that comes out of the i2s block which generally goes to the audio codec. Signed-off-by: Sonny Rao <sonnyrao@chromium.org> [removed CLK_SET_RATE_PARENT from original patch] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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2 changed files with 2 additions and 1 deletions
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@ -308,7 +308,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
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RK3288_CLKGATE_CON(4), 2, GFLAGS),
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MUX(0, "i2s_pre", mux_i2s_pre_p, CLK_SET_RATE_PARENT,
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RK3288_CLKSEL_CON(4), 8, 2, MFLAGS),
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COMPOSITE_NODIV(0, "i2s0_clkout", mux_i2s_clkout_p, 0,
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COMPOSITE_NODIV(SCLK_I2S0_OUT, "i2s0_clkout", mux_i2s_clkout_p, 0,
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RK3288_CLKSEL_CON(4), 12, 1, MFLAGS,
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RK3288_CLKGATE_CON(4), 0, GFLAGS),
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GATE(SCLK_I2S0, "sclk_i2s0", "i2s_pre", CLK_SET_RATE_PARENT,
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@ -71,6 +71,7 @@
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#define SCLK_HDMI_CEC 110
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#define SCLK_HEVC_CABAC 111
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#define SCLK_HEVC_CORE 112
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#define SCLK_I2S0_OUT 113
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#define DCLK_VOP0 190
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#define DCLK_VOP1 191
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