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arm64: dts: qcom: sc7280: Mark some nodes as 'reserved'
With the standard Qualcomm TrustZone setup, components such as lpasscc, pdc_reset and watchdog shouldn't be touched by Linux. Mark them with the status 'reserved' and reenable them in the chrome-common dtsi. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20230919-fp5-initial-v2-1-14bb7cedadf5@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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d40291e52d
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2 changed files with 31 additions and 1 deletions
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@ -46,6 +46,26 @@ wpss_mem: memory@9ae00000 {
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};
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};
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&lpass_aon {
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status = "okay";
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};
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&lpass_core {
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status = "okay";
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};
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&lpass_hm {
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status = "okay";
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};
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&lpasscc {
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status = "okay";
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};
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&pdc_reset {
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status = "okay";
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};
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/* The PMIC PON code isn't compatible w/ how Chrome EC/BIOS handle things. */
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&pmk8350_pon {
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status = "disabled";
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@ -84,6 +104,10 @@ &scm {
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dma-coherent;
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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status = "okay";
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@ -2296,6 +2296,7 @@ lpasscc: lpasscc@3000000 {
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clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
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clock-names = "iface";
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#clock-cells = <1>;
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status = "reserved"; /* Owned by ADSP firmware */
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};
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lpass_rx_macro: codec@3200000 {
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@ -2447,6 +2448,7 @@ lpass_aon: clock-controller@3380000 {
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clock-names = "bi_tcxo", "bi_tcxo_ao", "iface";
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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status = "reserved"; /* Owned by ADSP firmware */
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};
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lpass_core: clock-controller@3900000 {
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@ -2457,6 +2459,7 @@ lpass_core: clock-controller@3900000 {
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power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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status = "reserved"; /* Owned by ADSP firmware */
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};
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lpass_cpu: audio@3987000 {
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@ -2527,6 +2530,7 @@ lpass_hm: clock-controller@3c00000 {
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clock-names = "bi_tcxo";
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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status = "reserved"; /* Owned by ADSP firmware */
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};
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lpass_ag_noc: interconnect@3c40000 {
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@ -4217,6 +4221,7 @@ pdc_reset: reset-controller@b5e0000 {
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compatible = "qcom,sc7280-pdc-global";
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reg = <0 0x0b5e0000 0 0x20000>;
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#reset-cells = <1>;
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status = "reserved"; /* Owned by firmware */
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};
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tsens0: thermal-sensor@c263000 {
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@ -5213,11 +5218,12 @@ msi-controller@17a40000 {
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};
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};
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watchdog@17c10000 {
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watchdog: watchdog@17c10000 {
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compatible = "qcom,apss-wdt-sc7280", "qcom,kpss-wdt";
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reg = <0 0x17c10000 0 0x1000>;
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clocks = <&sleep_clk>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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status = "reserved"; /* Owned by Gunyah hyp */
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};
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timer@17c20000 {
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