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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 21:57:43 +00:00
arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7
Add nodes for 3 mmc channels, 12 i2c channels, rtc, watchdog and adc on exynos7 SoC. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit is contained in:
Abhilash Kesavan
Kukjin Kim
parent
0a7d1d805d
commit
6de6f73ce6
2 changed files with 321 additions and 0 deletions
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@ -18,6 +18,8 @@ / {
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aliases {
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serial0 = &serial_2;
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mshc0 = &mmc_0;
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mshc2 = &mmc_2;
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};
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chosen {
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@ -37,3 +39,46 @@ &fin_pll {
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&serial_2 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&adc {
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status = "okay";
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};
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&mmc_0 {
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status = "okay";
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num-slots = <1>;
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broken-cd;
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cap-mmc-highspeed;
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non-removable;
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card-detect-delay = <200>;
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clock-frequency = <800000000>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <0 4>;
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samsung,dw-mshc-ddr-timing = <0 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 &sd0_bus8>;
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bus-width = <8>;
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};
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&mmc_2 {
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status = "okay";
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num-slots = <1>;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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clock-frequency = <400000000>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
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bus-width = <4>;
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disable-wp;
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};
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@ -113,6 +113,27 @@ clock_top0: clock-controller@105d0000 {
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"dout_sclk_mfc_pll";
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};
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clock_top1: clock-controller@105e0000 {
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compatible = "samsung,exynos7-clock-top1";
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reg = <0x105e0000 0xb000>;
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#clock-cells = <1>;
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clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
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<&clock_topc DOUT_SCLK_BUS1_PLL>,
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<&clock_topc DOUT_SCLK_CC_PLL>,
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<&clock_topc DOUT_SCLK_MFC_PLL>;
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clock-names = "fin_pll", "dout_sclk_bus0_pll",
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"dout_sclk_bus1_pll", "dout_sclk_cc_pll",
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"dout_sclk_mfc_pll";
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};
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clock_ccore: clock-controller@105b0000 {
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compatible = "samsung,exynos7-clock-ccore";
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reg = <0x105b0000 0xd00>;
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#clock-cells = <1>;
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clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_CCORE_133>;
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clock-names = "fin_pll", "dout_aclk_ccore_133";
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};
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clock_peric0: clock-controller@13610000 {
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compatible = "samsung,exynos7-clock-peric0";
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reg = <0x13610000 0xd00>;
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@ -143,6 +164,27 @@ clock_peris: clock-controller@10040000 {
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clock-names = "fin_pll", "dout_aclk_peris_66";
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};
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clock_fsys0: clock-controller@10e90000 {
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compatible = "samsung,exynos7-clock-fsys0";
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reg = <0x10e90000 0xd00>;
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#clock-cells = <1>;
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clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS0_200>,
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<&clock_top1 DOUT_SCLK_MMC2>;
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clock-names = "fin_pll", "dout_aclk_fsys0_200",
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"dout_sclk_mmc2";
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};
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clock_fsys1: clock-controller@156e0000 {
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compatible = "samsung,exynos7-clock-fsys1";
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reg = <0x156e0000 0xd00>;
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#clock-cells = <1>;
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clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>,
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<&clock_top1 DOUT_SCLK_MMC0>,
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<&clock_top1 DOUT_SCLK_MMC1>;
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clock-names = "fin_pll", "dout_aclk_fsys1_200",
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"dout_sclk_mmc0", "dout_sclk_mmc1";
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};
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serial_0: serial@13630000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13630000 0x100>;
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@ -236,6 +278,162 @@ pinctrl_fsys1: pinctrl@15690000 {
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interrupts = <0 203 0>;
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};
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hsi2c_0: hsi2c@13640000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13640000 0x1000>;
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interrupts = <0 441 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c0_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C0>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_1: hsi2c@13650000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13650000 0x1000>;
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interrupts = <0 442 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c1_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C1>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_2: hsi2c@14e60000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x14e60000 0x1000>;
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interrupts = <0 459 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c2_bus>;
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clocks = <&clock_peric1 PCLK_HSI2C2>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_3: hsi2c@14e70000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x14e70000 0x1000>;
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interrupts = <0 460 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c3_bus>;
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clocks = <&clock_peric1 PCLK_HSI2C3>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_4: hsi2c@13660000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13660000 0x1000>;
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interrupts = <0 443 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c4_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C4>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_5: hsi2c@13670000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13670000 0x1000>;
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interrupts = <0 444 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c5_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C5>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_6: hsi2c@14e00000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x14e00000 0x1000>;
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interrupts = <0 461 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c6_bus>;
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clocks = <&clock_peric1 PCLK_HSI2C6>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_7: hsi2c@13e10000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13e10000 0x1000>;
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interrupts = <0 462 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c7_bus>;
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clocks = <&clock_peric1 PCLK_HSI2C7>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_8: hsi2c@14e20000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x14e20000 0x1000>;
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interrupts = <0 463 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c8_bus>;
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clocks = <&clock_peric1 PCLK_HSI2C8>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_9: hsi2c@13680000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13680000 0x1000>;
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interrupts = <0 445 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c9_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C9>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_10: hsi2c@13690000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x13690000 0x1000>;
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interrupts = <0 446 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c10_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C10>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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hsi2c_11: hsi2c@136a0000 {
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compatible = "samsung,exynos7-hsi2c";
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reg = <0x136a0000 0x1000>;
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interrupts = <0 447 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&hs_i2c11_bus>;
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clocks = <&clock_peric0 PCLK_HSI2C11>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 0xff01>,
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@ -248,6 +446,84 @@ pmu_system_controller: system-controller@105c0000 {
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compatible = "samsung,exynos7-pmu", "syscon";
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reg = <0x105c0000 0x5000>;
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};
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rtc: rtc@10590000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10590000 0x100>;
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interrupts = <0 355 0>, <0 356 0>;
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clocks = <&clock_ccore PCLK_RTC>;
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clock-names = "rtc";
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status = "disabled";
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};
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watchdog: watchdog@101d0000 {
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compatible = "samsung,exynos7-wdt";
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reg = <0x101d0000 0x100>;
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interrupts = <0 110 0>;
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clocks = <&clock_peris PCLK_WDT>;
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clock-names = "watchdog";
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samsung,syscon-phandle = <&pmu_system_controller>;
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status = "disabled";
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};
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mmc_0: mmc@15740000 {
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compatible = "samsung,exynos7-dw-mshc-smu";
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interrupts = <0 201 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x15740000 0x2000>;
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clocks = <&clock_fsys1 ACLK_MMC0>,
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<&clock_top1 CLK_SCLK_MMC0>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x40>;
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status = "disabled";
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};
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mmc_1: mmc@15750000 {
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compatible = "samsung,exynos7-dw-mshc";
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interrupts = <0 202 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x15750000 0x2000>;
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clocks = <&clock_fsys1 ACLK_MMC1>,
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<&clock_top1 CLK_SCLK_MMC1>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x40>;
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status = "disabled";
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};
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mmc_2: mmc@15560000 {
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compatible = "samsung,exynos7-dw-mshc-smu";
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interrupts = <0 216 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x15560000 0x2000>;
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clocks = <&clock_fsys0 ACLK_MMC2>,
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<&clock_top1 CLK_SCLK_MMC2>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x40>;
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status = "disabled";
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};
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adc: adc@13620000 {
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compatible = "samsung,exynos7-adc";
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reg = <0x13620000 0x100>;
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interrupts = <0 448 0>;
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clocks = <&clock_peric0 PCLK_ADCIF>;
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clock-names = "adc";
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#io-channel-cells = <1>;
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io-channel-ranges;
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status = "disabled";
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};
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pwm: pwm@136c0000 {
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compatible = "samsung,exynos4210-pwm";
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reg = <0x136c0000 0x100>;
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samsung,pwm-outputs = <0>, <1>, <2>, <3>;
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#pwm-cells = <3>;
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clocks = <&clock_peric0 PCLK_PWM>;
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clock-names = "timers";
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};
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};
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};
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