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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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serial: sh-sci: Call sci_serial_{in,out}() directly
Unlike the 8250 serial driver complex, the sh-sci driver uses only a single pair of functions to read and write serial port registers. Hence there is no need to incur the overhead of calling them through indirection, like the serial_port_{in,out}() wrappers do. Replace all calls to these wrappers by direct calls to sci_serial_{in,out}(). Remove the setup of the uart_port.serial_{in,out}() callbacks. After removal of all calls to serial_port_{in,out}() in the sh-sci driver, the only remaining user is uart_xchar_out(), which the sh-sci driver does not use. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Link: https://lore.kernel.org/r/51e79d601cb9d9d63822d3773d3cf05a96868612.1709548811.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
7bfb915a59
commit
6deab51402
1 changed files with 119 additions and 126 deletions
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@ -576,13 +576,13 @@ static void sci_start_tx(struct uart_port *port)
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#ifdef CONFIG_SERIAL_SH_SCI_DMA
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
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u16 new, scr = serial_port_in(port, SCSCR);
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u16 new, scr = sci_serial_in(port, SCSCR);
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if (s->chan_tx)
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new = scr | SCSCR_TDRQE;
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else
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new = scr & ~SCSCR_TDRQE;
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if (new != scr)
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serial_port_out(port, SCSCR, new);
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sci_serial_out(port, SCSCR, new);
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}
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if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
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@ -599,7 +599,7 @@ static void sci_start_tx(struct uart_port *port)
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if (!s->chan_tx || s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE ||
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port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
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/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
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ctrl = serial_port_in(port, SCSCR);
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ctrl = sci_serial_in(port, SCSCR);
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/*
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* For SCI, TE (transmit enable) must be set after setting TIE
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@ -609,7 +609,7 @@ static void sci_start_tx(struct uart_port *port)
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if (port->type == PORT_SCI)
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ctrl |= SCSCR_TE;
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serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
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sci_serial_out(port, SCSCR, ctrl | SCSCR_TIE);
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}
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}
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@ -618,14 +618,14 @@ static void sci_stop_tx(struct uart_port *port)
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unsigned short ctrl;
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/* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
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ctrl = serial_port_in(port, SCSCR);
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ctrl = sci_serial_in(port, SCSCR);
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
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ctrl &= ~SCSCR_TDRQE;
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ctrl &= ~SCSCR_TIE;
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serial_port_out(port, SCSCR, ctrl);
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sci_serial_out(port, SCSCR, ctrl);
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#ifdef CONFIG_SERIAL_SH_SCI_DMA
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if (to_sci_port(port)->chan_tx &&
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@ -640,41 +640,40 @@ static void sci_start_rx(struct uart_port *port)
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{
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unsigned short ctrl;
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ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port);
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ctrl = sci_serial_in(port, SCSCR) | port_rx_irq_mask(port);
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
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ctrl &= ~SCSCR_RDRQE;
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serial_port_out(port, SCSCR, ctrl);
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sci_serial_out(port, SCSCR, ctrl);
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}
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static void sci_stop_rx(struct uart_port *port)
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{
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unsigned short ctrl;
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ctrl = serial_port_in(port, SCSCR);
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ctrl = sci_serial_in(port, SCSCR);
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
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ctrl &= ~SCSCR_RDRQE;
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ctrl &= ~port_rx_irq_mask(port);
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serial_port_out(port, SCSCR, ctrl);
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sci_serial_out(port, SCSCR, ctrl);
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}
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static void sci_clear_SCxSR(struct uart_port *port, unsigned int mask)
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{
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if (port->type == PORT_SCI) {
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/* Just store the mask */
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serial_port_out(port, SCxSR, mask);
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sci_serial_out(port, SCxSR, mask);
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} else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) {
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/* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */
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/* Only clear the status bits we want to clear */
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serial_port_out(port, SCxSR,
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serial_port_in(port, SCxSR) & mask);
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sci_serial_out(port, SCxSR, sci_serial_in(port, SCxSR) & mask);
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} else {
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/* Store the mask, clear parity/framing errors */
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serial_port_out(port, SCxSR, mask & ~(SCIF_FERC | SCIF_PERC));
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sci_serial_out(port, SCxSR, mask & ~(SCIF_FERC | SCIF_PERC));
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}
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}
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@ -688,7 +687,7 @@ static int sci_poll_get_char(struct uart_port *port)
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int c;
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do {
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status = serial_port_in(port, SCxSR);
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status = sci_serial_in(port, SCxSR);
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if (status & SCxSR_ERRORS(port)) {
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sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port));
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continue;
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@ -699,10 +698,10 @@ static int sci_poll_get_char(struct uart_port *port)
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if (!(status & SCxSR_RDxF(port)))
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return NO_POLL_CHAR;
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c = serial_port_in(port, SCxRDR);
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c = sci_serial_in(port, SCxRDR);
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/* Dummy read */
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serial_port_in(port, SCxSR);
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sci_serial_in(port, SCxSR);
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sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
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return c;
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@ -714,10 +713,10 @@ static void sci_poll_put_char(struct uart_port *port, unsigned char c)
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unsigned short status;
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do {
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status = serial_port_in(port, SCxSR);
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status = sci_serial_in(port, SCxSR);
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} while (!(status & SCxSR_TDxE(port)));
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serial_port_out(port, SCxTDR, c);
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sci_serial_out(port, SCxTDR, c);
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sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
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}
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#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE ||
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@ -736,8 +735,8 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
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}
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
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u16 data = serial_port_in(port, SCPDR);
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u16 ctrl = serial_port_in(port, SCPCR);
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u16 data = sci_serial_in(port, SCPDR);
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u16 ctrl = sci_serial_in(port, SCPCR);
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/* Enable RXD and TXD pin functions */
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ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC);
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@ -756,10 +755,10 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
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/* Enable CTS# pin function */
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ctrl &= ~SCPCR_CTSC;
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}
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serial_port_out(port, SCPDR, data);
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serial_port_out(port, SCPCR, ctrl);
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sci_serial_out(port, SCPDR, data);
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sci_serial_out(port, SCPCR, ctrl);
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} else if (sci_getreg(port, SCSPTR)->size) {
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u16 status = serial_port_in(port, SCSPTR);
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u16 status = sci_serial_in(port, SCSPTR);
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/* RTS# is always output; and active low, unless autorts */
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status |= SCSPTR_RTSIO;
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@ -769,7 +768,7 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
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status &= ~SCSPTR_RTSDT;
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/* CTS# and SCK are inputs */
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status &= ~(SCSPTR_CTSIO | SCSPTR_SCKIO);
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serial_port_out(port, SCSPTR, status);
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sci_serial_out(port, SCSPTR, status);
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}
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}
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@ -781,13 +780,13 @@ static int sci_txfill(struct uart_port *port)
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reg = sci_getreg(port, SCTFDR);
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if (reg->size)
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return serial_port_in(port, SCTFDR) & fifo_mask;
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return sci_serial_in(port, SCTFDR) & fifo_mask;
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reg = sci_getreg(port, SCFDR);
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if (reg->size)
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return serial_port_in(port, SCFDR) >> 8;
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return sci_serial_in(port, SCFDR) >> 8;
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return !(serial_port_in(port, SCxSR) & SCI_TDRE);
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return !(sci_serial_in(port, SCxSR) & SCI_TDRE);
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}
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static int sci_txroom(struct uart_port *port)
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@ -803,13 +802,13 @@ static int sci_rxfill(struct uart_port *port)
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reg = sci_getreg(port, SCRFDR);
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if (reg->size)
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return serial_port_in(port, SCRFDR) & fifo_mask;
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return sci_serial_in(port, SCRFDR) & fifo_mask;
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reg = sci_getreg(port, SCFDR);
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if (reg->size)
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return serial_port_in(port, SCFDR) & fifo_mask;
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return sci_serial_in(port, SCFDR) & fifo_mask;
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return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
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return (sci_serial_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
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}
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/* ********************************************************************** *
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@ -824,14 +823,14 @@ static void sci_transmit_chars(struct uart_port *port)
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unsigned short ctrl;
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int count;
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status = serial_port_in(port, SCxSR);
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status = sci_serial_in(port, SCxSR);
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if (!(status & SCxSR_TDxE(port))) {
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ctrl = serial_port_in(port, SCSCR);
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ctrl = sci_serial_in(port, SCSCR);
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if (uart_circ_empty(xmit))
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ctrl &= ~SCSCR_TIE;
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else
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ctrl |= SCSCR_TIE;
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serial_port_out(port, SCSCR, ctrl);
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sci_serial_out(port, SCSCR, ctrl);
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return;
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}
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@ -847,15 +846,15 @@ static void sci_transmit_chars(struct uart_port *port)
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c = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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} else if (port->type == PORT_SCI && uart_circ_empty(xmit)) {
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ctrl = serial_port_in(port, SCSCR);
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ctrl = sci_serial_in(port, SCSCR);
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ctrl &= ~SCSCR_TE;
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serial_port_out(port, SCSCR, ctrl);
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sci_serial_out(port, SCSCR, ctrl);
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return;
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} else {
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break;
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}
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serial_port_out(port, SCxTDR, c);
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sci_serial_out(port, SCxTDR, c);
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port->icount.tx++;
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} while (--count > 0);
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@ -866,10 +865,10 @@ static void sci_transmit_chars(struct uart_port *port)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit)) {
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if (port->type == PORT_SCI) {
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ctrl = serial_port_in(port, SCSCR);
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ctrl = sci_serial_in(port, SCSCR);
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ctrl &= ~SCSCR_TIE;
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ctrl |= SCSCR_TEIE;
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serial_port_out(port, SCSCR, ctrl);
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sci_serial_out(port, SCSCR, ctrl);
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}
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sci_stop_tx(port);
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@ -883,7 +882,7 @@ static void sci_receive_chars(struct uart_port *port)
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unsigned short status;
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unsigned char flag;
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status = serial_port_in(port, SCxSR);
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status = sci_serial_in(port, SCxSR);
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if (!(status & SCxSR_RDxF(port)))
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return;
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@ -896,7 +895,7 @@ static void sci_receive_chars(struct uart_port *port)
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break;
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if (port->type == PORT_SCI) {
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char c = serial_port_in(port, SCxRDR);
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char c = sci_serial_in(port, SCxRDR);
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if (uart_handle_sysrq_char(port, c))
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count = 0;
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else
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if (port->type == PORT_SCIF ||
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port->type == PORT_HSCIF) {
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status = serial_port_in(port, SCxSR);
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c = serial_port_in(port, SCxRDR);
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status = sci_serial_in(port, SCxSR);
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c = sci_serial_in(port, SCxRDR);
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} else {
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c = serial_port_in(port, SCxRDR);
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status = serial_port_in(port, SCxSR);
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c = sci_serial_in(port, SCxRDR);
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status = sci_serial_in(port, SCxSR);
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}
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if (uart_handle_sysrq_char(port, c)) {
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count--; i--;
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@ -932,7 +931,7 @@ static void sci_receive_chars(struct uart_port *port)
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}
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}
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serial_port_in(port, SCxSR); /* dummy read */
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sci_serial_in(port, SCxSR); /* dummy read */
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sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
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copied += count;
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@ -944,8 +943,8 @@ static void sci_receive_chars(struct uart_port *port)
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tty_flip_buffer_push(tport);
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} else {
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/* TTY buffers full; read from RX reg to prevent lockup */
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serial_port_in(port, SCxRDR);
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serial_port_in(port, SCxSR); /* dummy read */
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sci_serial_in(port, SCxRDR);
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sci_serial_in(port, SCxSR); /* dummy read */
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sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
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}
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}
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@ -953,7 +952,7 @@ static void sci_receive_chars(struct uart_port *port)
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static int sci_handle_errors(struct uart_port *port)
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{
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int copied = 0;
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unsigned short status = serial_port_in(port, SCxSR);
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unsigned short status = sci_serial_in(port, SCxSR);
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struct tty_port *tport = &port->state->port;
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struct sci_port *s = to_sci_port(port);
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@ -1000,10 +999,10 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
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if (!reg->size)
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return 0;
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status = serial_port_in(port, s->params->overrun_reg);
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status = sci_serial_in(port, s->params->overrun_reg);
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if (status & s->params->overrun_mask) {
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status &= ~s->params->overrun_mask;
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serial_port_out(port, s->params->overrun_reg, status);
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sci_serial_out(port, s->params->overrun_reg, status);
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port->icount.overrun++;
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@ -1018,7 +1017,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
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static int sci_handle_breaks(struct uart_port *port)
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{
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int copied = 0;
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unsigned short status = serial_port_in(port, SCxSR);
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unsigned short status = sci_serial_in(port, SCxSR);
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struct tty_port *tport = &port->state->port;
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if (uart_handle_break(port))
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@ -1051,7 +1050,7 @@ static int scif_set_rtrg(struct uart_port *port, int rx_trig)
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/* HSCIF can be set to an arbitrary level. */
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if (sci_getreg(port, HSRTRGR)->size) {
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serial_port_out(port, HSRTRGR, rx_trig);
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sci_serial_out(port, HSRTRGR, rx_trig);
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return rx_trig;
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}
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@ -1092,9 +1091,9 @@ static int scif_set_rtrg(struct uart_port *port, int rx_trig)
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return 1;
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}
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serial_port_out(port, SCFCR,
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(serial_port_in(port, SCFCR) &
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~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits);
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sci_serial_out(port, SCFCR,
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(sci_serial_in(port, SCFCR) &
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~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits);
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return rx_trig;
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}
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@ -1102,9 +1101,9 @@ static int scif_set_rtrg(struct uart_port *port, int rx_trig)
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static int scif_rtrg_enabled(struct uart_port *port)
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{
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if (sci_getreg(port, HSRTRGR)->size)
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return serial_port_in(port, HSRTRGR) != 0;
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return sci_serial_in(port, HSRTRGR) != 0;
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else
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return (serial_port_in(port, SCFCR) &
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return (sci_serial_in(port, SCFCR) &
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(SCFCR_RTRG0 | SCFCR_RTRG1)) != 0;
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}
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@ -1219,8 +1218,8 @@ static void sci_dma_tx_complete(void *arg)
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s->cookie_tx = -EINVAL;
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB ||
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s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE) {
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u16 ctrl = serial_port_in(port, SCSCR);
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serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE);
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u16 ctrl = sci_serial_in(port, SCSCR);
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sci_serial_out(port, SCSCR, ctrl & ~SCSCR_TIE);
|
||||
if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE) {
|
||||
/* Switch irq from DMA to SCIF */
|
||||
dmaengine_pause(s->chan_tx_saved);
|
||||
|
@ -1296,7 +1295,7 @@ static void sci_dma_rx_reenable_irq(struct sci_port *s)
|
|||
u16 scr;
|
||||
|
||||
/* Direct new serial port interrupts back to CPU */
|
||||
scr = serial_port_in(port, SCSCR);
|
||||
scr = sci_serial_in(port, SCSCR);
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB ||
|
||||
s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE) {
|
||||
enable_irq(s->irqs[SCIx_RXI_IRQ]);
|
||||
|
@ -1305,7 +1304,7 @@ static void sci_dma_rx_reenable_irq(struct sci_port *s)
|
|||
else
|
||||
scr &= ~SCSCR_RDRQE;
|
||||
}
|
||||
serial_port_out(port, SCSCR, scr | SCSCR_RIE);
|
||||
sci_serial_out(port, SCSCR, scr | SCSCR_RIE);
|
||||
}
|
||||
|
||||
static void sci_dma_rx_complete(void *arg)
|
||||
|
@ -1714,8 +1713,8 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
|
|||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_DMA
|
||||
if (s->chan_rx) {
|
||||
u16 scr = serial_port_in(port, SCSCR);
|
||||
u16 ssr = serial_port_in(port, SCxSR);
|
||||
u16 scr = sci_serial_in(port, SCSCR);
|
||||
u16 ssr = sci_serial_in(port, SCxSR);
|
||||
|
||||
/* Disable future Rx interrupts */
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB ||
|
||||
|
@ -1733,10 +1732,10 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
|
|||
|
||||
scr &= ~SCSCR_RIE;
|
||||
}
|
||||
serial_port_out(port, SCSCR, scr);
|
||||
sci_serial_out(port, SCSCR, scr);
|
||||
/* Clear current interrupt */
|
||||
serial_port_out(port, SCxSR,
|
||||
ssr & ~(SCIF_DR | SCxSR_RDxF(port)));
|
||||
sci_serial_out(port, SCxSR,
|
||||
ssr & ~(SCIF_DR | SCxSR_RDxF(port)));
|
||||
dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u us\n",
|
||||
jiffies, s->rx_timeout);
|
||||
start_hrtimer_us(&s->rx_timer, s->rx_timeout);
|
||||
|
@ -1786,9 +1785,9 @@ static irqreturn_t sci_tx_end_interrupt(int irq, void *ptr)
|
|||
return sci_tx_interrupt(irq, ptr);
|
||||
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
ctrl = serial_port_in(port, SCSCR);
|
||||
ctrl = sci_serial_in(port, SCSCR);
|
||||
ctrl &= ~(SCSCR_TE | SCSCR_TEIE);
|
||||
serial_port_out(port, SCSCR, ctrl);
|
||||
sci_serial_out(port, SCSCR, ctrl);
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
@ -1802,7 +1801,7 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr)
|
|||
sci_handle_breaks(port);
|
||||
|
||||
/* drop invalid character received before break was detected */
|
||||
serial_port_in(port, SCxRDR);
|
||||
sci_serial_in(port, SCxRDR);
|
||||
|
||||
sci_clear_SCxSR(port, SCxSR_BREAK_CLEAR(port));
|
||||
|
||||
|
@ -1816,7 +1815,7 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr)
|
|||
|
||||
if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) {
|
||||
/* Break and Error interrupts are muxed */
|
||||
unsigned short ssr_status = serial_port_in(port, SCxSR);
|
||||
unsigned short ssr_status = sci_serial_in(port, SCxSR);
|
||||
|
||||
/* Break Interrupt */
|
||||
if (ssr_status & SCxSR_BRK(port))
|
||||
|
@ -1831,7 +1830,7 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr)
|
|||
if (port->type == PORT_SCI) {
|
||||
if (sci_handle_errors(port)) {
|
||||
/* discard character in rx buffer */
|
||||
serial_port_in(port, SCxSR);
|
||||
sci_serial_in(port, SCxSR);
|
||||
sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
|
||||
}
|
||||
} else {
|
||||
|
@ -1856,12 +1855,12 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
|
|||
struct sci_port *s = to_sci_port(port);
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
|
||||
ssr_status = serial_port_in(port, SCxSR);
|
||||
scr_status = serial_port_in(port, SCSCR);
|
||||
ssr_status = sci_serial_in(port, SCxSR);
|
||||
scr_status = sci_serial_in(port, SCSCR);
|
||||
if (s->params->overrun_reg == SCxSR)
|
||||
orer_status = ssr_status;
|
||||
else if (sci_getreg(port, s->params->overrun_reg)->size)
|
||||
orer_status = serial_port_in(port, s->params->overrun_reg);
|
||||
orer_status = sci_serial_in(port, s->params->overrun_reg);
|
||||
|
||||
err_enabled = scr_status & port_rx_irq_mask(port);
|
||||
|
||||
|
@ -2038,7 +2037,7 @@ static void sci_free_irq(struct sci_port *port)
|
|||
|
||||
static unsigned int sci_tx_empty(struct uart_port *port)
|
||||
{
|
||||
unsigned short status = serial_port_in(port, SCxSR);
|
||||
unsigned short status = sci_serial_in(port, SCxSR);
|
||||
unsigned short in_tx_fifo = sci_txfill(port);
|
||||
|
||||
return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
|
||||
|
@ -2047,27 +2046,27 @@ static unsigned int sci_tx_empty(struct uart_port *port)
|
|||
static void sci_set_rts(struct uart_port *port, bool state)
|
||||
{
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
u16 data = serial_port_in(port, SCPDR);
|
||||
u16 data = sci_serial_in(port, SCPDR);
|
||||
|
||||
/* Active low */
|
||||
if (state)
|
||||
data &= ~SCPDR_RTSD;
|
||||
else
|
||||
data |= SCPDR_RTSD;
|
||||
serial_port_out(port, SCPDR, data);
|
||||
sci_serial_out(port, SCPDR, data);
|
||||
|
||||
/* RTS# is output */
|
||||
serial_port_out(port, SCPCR,
|
||||
serial_port_in(port, SCPCR) | SCPCR_RTSC);
|
||||
sci_serial_out(port, SCPCR,
|
||||
sci_serial_in(port, SCPCR) | SCPCR_RTSC);
|
||||
} else if (sci_getreg(port, SCSPTR)->size) {
|
||||
u16 ctrl = serial_port_in(port, SCSPTR);
|
||||
u16 ctrl = sci_serial_in(port, SCSPTR);
|
||||
|
||||
/* Active low */
|
||||
if (state)
|
||||
ctrl &= ~SCSPTR_RTSDT;
|
||||
else
|
||||
ctrl |= SCSPTR_RTSDT;
|
||||
serial_port_out(port, SCSPTR, ctrl);
|
||||
sci_serial_out(port, SCSPTR, ctrl);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2075,10 +2074,10 @@ static bool sci_get_cts(struct uart_port *port)
|
|||
{
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
/* Active low */
|
||||
return !(serial_port_in(port, SCPDR) & SCPDR_CTSD);
|
||||
return !(sci_serial_in(port, SCPDR) & SCPDR_CTSD);
|
||||
} else if (sci_getreg(port, SCSPTR)->size) {
|
||||
/* Active low */
|
||||
return !(serial_port_in(port, SCSPTR) & SCSPTR_CTSDT);
|
||||
return !(sci_serial_in(port, SCSPTR) & SCSPTR_CTSDT);
|
||||
}
|
||||
|
||||
return true;
|
||||
|
@ -2108,9 +2107,8 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|||
*/
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size)
|
||||
serial_port_out(port, SCFCR,
|
||||
serial_port_in(port, SCFCR) |
|
||||
SCFCR_LOOP);
|
||||
sci_serial_out(port, SCFCR,
|
||||
sci_serial_in(port, SCFCR) | SCFCR_LOOP);
|
||||
}
|
||||
|
||||
mctrl_gpio_set(s->gpios, mctrl);
|
||||
|
@ -2120,21 +2118,21 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|||
|
||||
if (!(mctrl & TIOCM_RTS)) {
|
||||
/* Disable Auto RTS */
|
||||
serial_port_out(port, SCFCR,
|
||||
serial_port_in(port, SCFCR) & ~SCFCR_MCE);
|
||||
sci_serial_out(port, SCFCR,
|
||||
sci_serial_in(port, SCFCR) & ~SCFCR_MCE);
|
||||
|
||||
/* Clear RTS */
|
||||
sci_set_rts(port, 0);
|
||||
} else if (s->autorts) {
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
/* Enable RTS# pin function */
|
||||
serial_port_out(port, SCPCR,
|
||||
serial_port_in(port, SCPCR) & ~SCPCR_RTSC);
|
||||
sci_serial_out(port, SCPCR,
|
||||
sci_serial_in(port, SCPCR) & ~SCPCR_RTSC);
|
||||
}
|
||||
|
||||
/* Enable Auto RTS */
|
||||
serial_port_out(port, SCFCR,
|
||||
serial_port_in(port, SCFCR) | SCFCR_MCE);
|
||||
sci_serial_out(port, SCFCR,
|
||||
sci_serial_in(port, SCFCR) | SCFCR_MCE);
|
||||
} else {
|
||||
/* Set RTS */
|
||||
sci_set_rts(port, 1);
|
||||
|
@ -2187,8 +2185,8 @@ static void sci_break_ctl(struct uart_port *port, int break_state)
|
|||
}
|
||||
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
scsptr = serial_port_in(port, SCSPTR);
|
||||
scscr = serial_port_in(port, SCSCR);
|
||||
scsptr = sci_serial_in(port, SCSPTR);
|
||||
scscr = sci_serial_in(port, SCSCR);
|
||||
|
||||
if (break_state == -1) {
|
||||
scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
|
||||
|
@ -2198,8 +2196,8 @@ static void sci_break_ctl(struct uart_port *port, int break_state)
|
|||
scscr |= SCSCR_TE;
|
||||
}
|
||||
|
||||
serial_port_out(port, SCSPTR, scsptr);
|
||||
serial_port_out(port, SCSCR, scscr);
|
||||
sci_serial_out(port, SCSPTR, scsptr);
|
||||
sci_serial_out(port, SCSCR, scscr);
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
}
|
||||
|
||||
|
@ -2239,9 +2237,9 @@ static void sci_shutdown(struct uart_port *port)
|
|||
* Stop RX and TX, disable related interrupts, keep clock source
|
||||
* and HSCIF TOT bits
|
||||
*/
|
||||
scr = serial_port_in(port, SCSCR);
|
||||
serial_port_out(port, SCSCR, scr &
|
||||
(SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot));
|
||||
scr = sci_serial_in(port, SCSCR);
|
||||
sci_serial_out(port, SCSCR,
|
||||
scr & (SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot));
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_DMA
|
||||
|
@ -2390,19 +2388,19 @@ static void sci_reset(struct uart_port *port)
|
|||
unsigned int status;
|
||||
struct sci_port *s = to_sci_port(port);
|
||||
|
||||
serial_port_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */
|
||||
sci_serial_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */
|
||||
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size)
|
||||
serial_port_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
|
||||
sci_serial_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
|
||||
|
||||
sci_clear_SCxSR(port,
|
||||
SCxSR_RDxF_CLEAR(port) & SCxSR_ERROR_CLEAR(port) &
|
||||
SCxSR_BREAK_CLEAR(port));
|
||||
if (sci_getreg(port, SCLSR)->size) {
|
||||
status = serial_port_in(port, SCLSR);
|
||||
status = sci_serial_in(port, SCLSR);
|
||||
status &= ~(SCLSR_TO | SCLSR_ORER);
|
||||
serial_port_out(port, SCLSR, status);
|
||||
sci_serial_out(port, SCLSR, status);
|
||||
}
|
||||
|
||||
if (s->rx_trigger > 1) {
|
||||
|
@ -2540,8 +2538,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
* It controls the mux to select (H)SCK or frequency divided clock.
|
||||
*/
|
||||
if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) {
|
||||
serial_port_out(port, SCDL, dl);
|
||||
serial_port_out(port, SCCKS, sccks);
|
||||
sci_serial_out(port, SCDL, dl);
|
||||
sci_serial_out(port, SCCKS, sccks);
|
||||
}
|
||||
|
||||
uart_port_lock_irqsave(port, &flags);
|
||||
|
@ -2554,7 +2552,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
bits = tty_get_frame_size(termios->c_cflag);
|
||||
|
||||
if (sci_getreg(port, SEMR)->size)
|
||||
serial_port_out(port, SEMR, 0);
|
||||
sci_serial_out(port, SEMR, 0);
|
||||
|
||||
if (best_clk >= 0) {
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
|
||||
|
@ -2569,9 +2567,9 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
case 27: smr_val |= SCSMR_SRC_27; break;
|
||||
}
|
||||
smr_val |= cks;
|
||||
serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
|
||||
serial_port_out(port, SCSMR, smr_val);
|
||||
serial_port_out(port, SCBRR, brr);
|
||||
sci_serial_out(port, SCSCR, scr_val | s->hscif_tot);
|
||||
sci_serial_out(port, SCSMR, smr_val);
|
||||
sci_serial_out(port, SCBRR, brr);
|
||||
if (sci_getreg(port, HSSRR)->size) {
|
||||
unsigned int hssrr = srr | HSCIF_SRE;
|
||||
/* Calculate deviation from intended rate at the
|
||||
|
@ -2593,7 +2591,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
HSCIF_SRHP_MASK;
|
||||
hssrr |= HSCIF_SRDE;
|
||||
}
|
||||
serial_port_out(port, HSSRR, hssrr);
|
||||
sci_serial_out(port, HSSRR, hssrr);
|
||||
}
|
||||
|
||||
/* Wait one bit interval */
|
||||
|
@ -2601,10 +2599,10 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
} else {
|
||||
/* Don't touch the bit rate configuration */
|
||||
scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0);
|
||||
smr_val |= serial_port_in(port, SCSMR) &
|
||||
smr_val |= sci_serial_in(port, SCSMR) &
|
||||
(SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS);
|
||||
serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
|
||||
serial_port_out(port, SCSMR, smr_val);
|
||||
sci_serial_out(port, SCSCR, scr_val | s->hscif_tot);
|
||||
sci_serial_out(port, SCSMR, smr_val);
|
||||
}
|
||||
|
||||
sci_init_pins(port, termios->c_cflag);
|
||||
|
@ -2613,7 +2611,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
s->autorts = false;
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size) {
|
||||
unsigned short ctrl = serial_port_in(port, SCFCR);
|
||||
unsigned short ctrl = sci_serial_in(port, SCFCR);
|
||||
|
||||
if ((port->flags & UPF_HARD_FLOW) &&
|
||||
(termios->c_cflag & CRTSCTS)) {
|
||||
|
@ -2630,7 +2628,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
*/
|
||||
ctrl &= ~(SCFCR_RFRST | SCFCR_TFRST);
|
||||
|
||||
serial_port_out(port, SCFCR, ctrl);
|
||||
sci_serial_out(port, SCFCR, ctrl);
|
||||
}
|
||||
if (port->flags & UPF_HARD_FLOW) {
|
||||
/* Refresh (Auto) RTS */
|
||||
|
@ -2645,7 +2643,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
if (port->type != PORT_SCI)
|
||||
scr_val |= SCSCR_TE;
|
||||
scr_val |= SCSCR_RE | (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
|
||||
serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
|
||||
sci_serial_out(port, SCSCR, scr_val | s->hscif_tot);
|
||||
if ((srr + 1 == 5) &&
|
||||
(port->type == PORT_SCIFA || port->type == PORT_SCIFB)) {
|
||||
/*
|
||||
|
@ -3017,9 +3015,6 @@ static int sci_init_single(struct platform_device *dev,
|
|||
port->irq = sci_port->irqs[SCIx_RXI_IRQ];
|
||||
port->irqflags = 0;
|
||||
|
||||
port->serial_in = sci_serial_in;
|
||||
port->serial_out = sci_serial_out;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3056,21 +3051,21 @@ static void serial_console_write(struct console *co, const char *s,
|
|||
uart_port_lock_irqsave(port, &flags);
|
||||
|
||||
/* first save SCSCR then disable interrupts, keep clock source */
|
||||
ctrl = serial_port_in(port, SCSCR);
|
||||
ctrl = sci_serial_in(port, SCSCR);
|
||||
ctrl_temp = SCSCR_RE | SCSCR_TE |
|
||||
(sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
|
||||
(ctrl & (SCSCR_CKE1 | SCSCR_CKE0));
|
||||
serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot);
|
||||
sci_serial_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot);
|
||||
|
||||
uart_console_write(port, s, count, serial_console_putchar);
|
||||
|
||||
/* wait until fifo is empty and last bit has been transmitted */
|
||||
bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
|
||||
while ((serial_port_in(port, SCxSR) & bits) != bits)
|
||||
while ((sci_serial_in(port, SCxSR) & bits) != bits)
|
||||
cpu_relax();
|
||||
|
||||
/* restore the SCSCR */
|
||||
serial_port_out(port, SCSCR, ctrl);
|
||||
sci_serial_out(port, SCSCR, ctrl);
|
||||
|
||||
if (locked)
|
||||
uart_port_unlock_irqrestore(port, flags);
|
||||
|
@ -3503,8 +3498,6 @@ static int __init early_console_setup(struct earlycon_device *device,
|
|||
if (!device->port.membase)
|
||||
return -ENODEV;
|
||||
|
||||
device->port.serial_in = sci_serial_in;
|
||||
device->port.serial_out = sci_serial_out;
|
||||
device->port.type = type;
|
||||
memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port));
|
||||
port_cfg.type = type;
|
||||
|
|
Loading…
Reference in a new issue