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dmaengine: idxd: clear MSIX permission entry on shutdown
Add disabling/clearing of MSIX permission entries on device shutdown to
mirror the enabling of the MSIX entries on probe. Current code left the
MSIX enabled and the pasid entries still programmed at device shutdown.
Fixes: 8e50d39265
("dmaengine: idxd: Add shared workqueue support")
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/161824457969.882533.6020239898682672311.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
07503e6aef
commit
6df0e6c57d
3 changed files with 34 additions and 9 deletions
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@ -574,6 +574,36 @@ void idxd_device_drain_pasid(struct idxd_device *idxd, int pasid)
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}
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/* Device configuration bits */
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void idxd_msix_perm_setup(struct idxd_device *idxd)
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{
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union msix_perm mperm;
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int i, msixcnt;
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msixcnt = pci_msix_vec_count(idxd->pdev);
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if (msixcnt < 0)
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return;
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mperm.bits = 0;
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mperm.pasid = idxd->pasid;
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mperm.pasid_en = device_pasid_enabled(idxd);
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for (i = 1; i < msixcnt; i++)
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iowrite32(mperm.bits, idxd->reg_base + idxd->msix_perm_offset + i * 8);
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}
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void idxd_msix_perm_clear(struct idxd_device *idxd)
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{
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union msix_perm mperm;
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int i, msixcnt;
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msixcnt = pci_msix_vec_count(idxd->pdev);
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if (msixcnt < 0)
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return;
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mperm.bits = 0;
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for (i = 1; i < msixcnt; i++)
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iowrite32(mperm.bits, idxd->reg_base + idxd->msix_perm_offset + i * 8);
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}
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static void idxd_group_config_write(struct idxd_group *group)
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{
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struct idxd_device *idxd = group->idxd;
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@ -316,6 +316,8 @@ void idxd_unregister_driver(void);
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struct bus_type *idxd_get_bus_type(struct idxd_device *idxd);
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/* device interrupt control */
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void idxd_msix_perm_setup(struct idxd_device *idxd);
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void idxd_msix_perm_clear(struct idxd_device *idxd);
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irqreturn_t idxd_irq_handler(int vec, void *data);
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irqreturn_t idxd_misc_thread(int vec, void *data);
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irqreturn_t idxd_wq_thread(int irq, void *data);
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@ -65,7 +65,6 @@ static int idxd_setup_interrupts(struct idxd_device *idxd)
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struct idxd_irq_entry *irq_entry;
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int i, msixcnt;
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int rc = 0;
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union msix_perm mperm;
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msixcnt = pci_msix_vec_count(pdev);
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if (msixcnt < 0) {
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@ -144,14 +143,7 @@ static int idxd_setup_interrupts(struct idxd_device *idxd)
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}
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idxd_unmask_error_interrupts(idxd);
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/* Setup MSIX permission table */
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mperm.bits = 0;
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mperm.pasid = idxd->pasid;
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mperm.pasid_en = device_pasid_enabled(idxd);
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for (i = 1; i < msixcnt; i++)
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iowrite32(mperm.bits, idxd->reg_base + idxd->msix_perm_offset + i * 8);
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idxd_msix_perm_setup(idxd);
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return 0;
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err_no_irq:
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@ -510,6 +502,7 @@ static void idxd_shutdown(struct pci_dev *pdev)
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idxd_flush_work_list(irq_entry);
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}
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idxd_msix_perm_clear(idxd);
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destroy_workqueue(idxd->wq);
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}
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