mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 17:30:02 +00:00
pinctrl: Add Intel Cherryview/Braswell pin controller support
This driver supports the pin/GPIO controllers found in newer Intel SoCs like Cherryview and Braswell. The driver provides full GPIO support and minimal set of pin controlling funtionality. The driver is based on the original Cherryview GPIO driver authored by Ning Li and Alan Cox. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
354567e608
commit
6e08d6bbeb
3 changed files with 1532 additions and 0 deletions
|
@ -13,3 +13,15 @@ config PINCTRL_BAYTRAIL
|
||||||
so only a small amount is available for gpio use.
|
so only a small amount is available for gpio use.
|
||||||
|
|
||||||
Requires ACPI device enumeration code to set up a platform device.
|
Requires ACPI device enumeration code to set up a platform device.
|
||||||
|
|
||||||
|
config PINCTRL_CHERRYVIEW
|
||||||
|
tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
|
||||||
|
depends on ACPI
|
||||||
|
select PINMUX
|
||||||
|
select PINCONF
|
||||||
|
select GENERIC_PINCONF
|
||||||
|
select GPIOLIB
|
||||||
|
select GPIOLIB_IRQCHIP
|
||||||
|
help
|
||||||
|
Cherryview/Braswell pinctrl driver provides an interface that
|
||||||
|
allows configuring of SoC pins and using them as GPIOs.
|
||||||
|
|
|
@ -1,3 +1,4 @@
|
||||||
# Intel pin control drivers
|
# Intel pin control drivers
|
||||||
|
|
||||||
obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
|
obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
|
||||||
|
obj-$(CONFIG_PINCTRL_CHERRYVIEW) += pinctrl-cherryview.o
|
||||||
|
|
1519
drivers/pinctrl/intel/pinctrl-cherryview.c
Normal file
1519
drivers/pinctrl/intel/pinctrl-cherryview.c
Normal file
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue